The TPS54618C-Q1 uses a transconductance amplifier for the error amplifier and readily supports two of the commonly used frequency compensation circuits. The compensation circuits are shown in Figure 7-14. The Type-2 circuits are most likely implemented in high-bandwidth power supply designs using low-ESR output capacitors. In Type 2A, one additional high-frequency pole is added to attenuate high-frequency noise.

Figure 7-14 Types of Frequency Compensation

The design guidelines for TPS54618C-Q1 loop compensation are as follows:

1. The modulator pole, fpmod, and the esr zero, fz1, must be calculated using Equation 15 and Equation 16. Derating the output capacitor (C_OUT) can be needed if the output voltage is a high percentage of the capacitor rating. Use the capacitor manufacturer information to derate the capacitor value. Use Equation 17 and Equation 18 to estimate a starting point for the crossover frequency, fc. Equation 17 is the geometric mean of the modulator pole and the esr zero and Equation 18 is the mean of modulator pole and the switching frequency. Use the lower value of Equation 17 or Equation 18 as the maximum crossover frequency.
   Equation 15.
   Equation 16.
   Equation 17.
   Equation 18.

2. R3 can be determined by Equation 19:
   Equation 19.

   where

   • the gm_ea amplifier gain (245 μA/V)
   • gm_ps is the power stage gain (25 A/V)

3. Place a compensation zero at the dominant pole:
   
   C1 can be determined by Equation 20:
   Equation 20.

4. C2 is optional. It can be used to cancel the zero from the ESR of C_OUT.
   Equation 21.