ZHCSMS3 December 2020 TPS54622-EP
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY VOLTAGE (VIN AND PVIN PINS) | ||||||
VIN internal UVLO threshold | VIN rising | 4 | 4.5 | V | ||
VIN internal UVLO hysteresis | 150 | mV | ||||
VIN shutdown supply Current | EN = 0 V | 2 | 5 | μA | ||
VIN operating – non switching supply current | VSENSE = 810 mV | 600 | 800 | μA | ||
ENABLE AND UVLO (EN PIN) | ||||||
Enable threshold | Rising | 1.22 | 1.26 | V | ||
Enable threshold | Falling | 1.1 | 1.18 | |||
Input current | EN = 1.1 V | 1.08 | μA | |||
Hysteresis current | EN = 1.3 V | 3.2 | μA | |||
VOLTAGE REFERENCE | ||||||
Voltage reference | 0 A ≤ IOUT ≤ 6 A | 0.594 | 0.6 | 0.606 | V | |
MOSFET | ||||||
High-side switch resistance | BOOT-PH = 3 V | 32 | 60 | mΩ | ||
High-side switch resistance(1) | BOOT-PH = 6 V | 26 | 40 | mΩ | ||
Low-side Switch Resistance(1) | VIN = 12 V | 19 | 30 | mΩ | ||
ERROR AMPLIFIER | ||||||
Error amplifier Transconductance (gm) | –2 μA < ICOMP < 2 μA, V(COMP) = 1 V | 1300 | μMhos | |||
Error amplifier dc gain | VSENSE = 0.6 V | 1000 | 3100 | V/V | ||
Error amplifier source/sink | V(COMP) = 1 V, 100-mV input overdrive | ±125 | μA | |||
Start switching threshold | 0.25 | V | ||||
COMP to Iswitch gm | 16 | A/V | ||||
CURRENT LIMIT | ||||||
High-side switch current limit threshold | 8 | 11 | 14 | A | ||
Low-side switch sourcing current limit | 6.5 | 10 | 15 | A | ||
Low-side switch sinking current limit | 2 | 3 | 4 | A | ||
Hiccup wait time | 512 | Cycles | ||||
Hiccup time before re-start | 16384 | Cycles | ||||
THERMAL SHUTDOWN | ||||||
Thermal shutdown (2) | 160 | 175 | °C | |||
Thermal shutdown hysteresis (2) | 10 | °C | ||||
Thermal shutdown hiccup time (2) | 16384 | Cycles | ||||
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN) | ||||||
Minimum switching frequency | Rrt = 240 kΩ (1%) | 160 | 200 | 240 | kHz | |
Switching frequency | Rrt = 100 kΩ (1%) | 400 | 480 | 560 | kHz | |
Maximum switching frequency | Rrt = 29 kΩ (1%) | 1500 | 1600 | 1900 | kHz | |
Minimum pulse width | 20 | ns | ||||
RT/CLK high threshold | 2 | V | ||||
RT/CLK low threshold | 0.7 | V | ||||
RT/CLK falling edge to PH rising edge delay | Measure at 500 kHz with RT resistor in series | 66 | ns | |||
Switching frequency range (RT mode set point and CLK mode) | 200 | 1600 | kHz | |||
PH (PH PIN) | ||||||
Minimum on-time | Measured at 90% to 90% of VIN, 25°C, IPH = 2A | 100 | 145 | ns | ||
BOOT (BOOT PIN) | ||||||
BOOT-PH UVLO | 2.3 | 3 | V | |||
SLOW START AND TRACKING (SS/TR PIN) | ||||||
SS charge current | 2.14 | μA | ||||
SS/TR to VSENSE matching | V(SS/TR) = 0.4 V | 16 | 60 | mV | ||
POWER GOOD (PWRGD PIN) | ||||||
VSENSE threshold | VSENSE falling (Fault) | 92 | % Vref | |||
VSENSE rising (Good) | 94 | % Vref | ||||
VSENSE rising (Fault) | 111 | % Vref | ||||
VSENSE falling (Good) | 109 | % Vref | ||||
Output high leakage | VSENSE = Vref, V(PWRGD) = 5.5 V | 30 | 100 | nA | ||
Output low sink current | V(PWRGD) = 0.3V | 2 | mA | |||
Minimum VIN for valid output | V(PWRGD) < 0.5 V at 100 μA | 0.6 | 1 | V | ||
Minimum SS/TR voltage for PWRGD | 1.4 | V |