ZHCS984B June 2012 – May 2019 TPS54678
PRODUCTION DATA.
The TPS54678 requires a high-quality ceramic, type X5R or X7R, input-decoupling capacitor of at least 10 μF of effective capacitance and in some applications a bulk capacitance. The effective capacitance includes any DC bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the TPS54678. The input ripple current can be calculated using Equation 23.
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor decreases as the DC bias across a capacitor increases.
For this example design, a ceramic capacitor with at least a 10-V voltage rating is required to support the maximum input voltage. For this example, three 47-μF and one 0.10-μF 10-V capacitors in parallel have been selected. In addition to these low ESR capacitors, an input bulk cap of 220-µF electrolytic is included so as to provide low source impedance at low frequencies for instances where the input voltage source is connected with a lossy feed.
The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 24. Using the design example values, IOUT_MAX = 6 A, CIN = 141 μF (neglecting the electrolytic due to high ESR), FSW = 500 kHz, yields an input voltage ripple of 21.3 mV and an rms input ripple current of 2.94 A.