Table 14. Design Parameters

8.2.1.2.1 Switching Frequency Selection

There is a tradeoff between higher and lower switching frequencies for buck converters. Higher switching frequencies may produce smaller solution size using lower valued inductors and smaller output capacitors compared to a power supply that switches at a lower frequency. However, the higher switching frequency causes extra switching losses, which decrease efficiency and impact thermal performance. In this design, a moderate switching frequency of 300 kHz achieves both a small solution size and a high-efficiency operation. With the frequency selected, use Equation 15 to calculate the timing resistor (R_T). The standard value of 68.1 kΩ is used in the design.

Equation 15.

8.2.1.2.2 Inductor Selection

Use Equation 16 to calculate the value of the output inductor (L). The coefficient, KIND, represents the amount of inductor-ripple current relative to the maximum output current. The output capacitor filters the inductor-ripple current. Therefore, selecting a high inductor-ripple current impacts the selection of the output capacitor because the output capacitor must have a ripple-current rating equal to or greater than the inductor-ripple current. Generally, the KIND coefficient should be kept between 0.2 and 0.3 for balanced performance. Using this target ripple current, the required inductor size can be calculated as shown in Equation 16.

Equation 16.

Selecting a value of 0.3 for the KIND coefficient, the target inductance, L, is 299 nH. Considering the variation and derating of the inductance and the 300-nH inductor, use Equation 17, Equation 18, and Equation 19 to calculate the inductor-ripple current (I_RIPPLE), RMS current (I_L(rms)), and peak current (I_L(peak)), respectively. These values should be used to select an inductor with approximately the target inductance value, and current ratings that allow normal operation with some margin.

Equation 17.

Equation 18.

Equation 19.

Considering the required inductance, RMS current, and peak current, the 300-nH inductor, SLC1480-301ML, from Coilcraft was selected for this application.

8.2.1.2.3 Output Capacitor Selection

Consider the following when selecting the value of the output capacitor:

• The output-voltage deviation during load transient
• The output-voltage ripple

8.2.1.2.4 Output Voltage Deviation During Load Transient

The desired response to a load transient is the first criterion for output capacitor selection. The output capacitor must supply the load with the required current when not immediately provided by the regulator. When the output capacitor supplies load current, the impedance of the capacitor affects the magnitude of the voltage deviation during the transient.

To meet the requirements for control-loop stability, the device requires the addition of compensation components in the design of the error amplifier. While these compensation components provide for a stable control loop, they often also reduce the speed with which the regulator can respond to load transients. The delay in the regulator response to load changes can be two or more clock cycles before the control loop reacts to the change. During that time, the difference (delta) between the old and the new load current must be supplied (or absorbed) by the output capacitance. The output capacitor impedance must be designed to supply or absorb the delta current while maintaining the output voltage within acceptable limits. Equation 20 and Equation 21 show the relationship between the transient response overshoot (V_OVER), the transient response undershoot (V_UNDER), and the required output capacitance (C_OUT).

Equation 20.

Equation 21.

If

• V_IN(min) > 2 × V_OUT, use overshoot to calculate minimum output capacitance.
• V_IN(min) < 2 × V_OUT, use undershoot to calculate minimum output capacitance.

In this case, the minimum designed input voltage, V_IN(min), is greater than 2 × V_OUT, so V_OVER dictates the minimum output capacitance. Therefore, using Equation 22, the minimum output capacitance required to meet the transient requirement is 1000 µF.

Equation 22.

8.2.1.2.5 Output Voltage Ripple

The output-voltage ripple is the second criterion for output capacitor selection. Use Equation 23 to calculate the minimum output capacitance required to meet the output-voltage ripple specification.

Equation 23.

In this case, the target maximum output-voltage ripple is 12 mV. Under this requirement, the minimum output capacitance for ripple is 330 µF. Because this capacitance value is smaller than the output capacitance required for the transient response, select the output capacitance value based on the transient requirement. Considering the variation and derating of capacitance, in this design, two 470-µF low-ESR polymer bulk capacitors and four 47-µF ceramic capacitors were selected to meet the transient specification with sufficient margin. Therefore C_OUT is equal to 1128 µF.

With the target output capacitance value selected, use Equation 24 to calculate the maximum ESR that the output-capacitor bank allows to meet the output-voltage ripple specification. Equation 24 indicates the ESR should be less than 1.3 mΩ. Each 470-µF ceramic capacitor contributes approximately 1.3 mΩ, making the effective ESR of the output capacitor bank approximately 0.65 mΩ which is within the specification with sufficient margin.

Equation 24.

8.2.1.2.6 Input Capacitor Selection

The power-stage input-decoupling capacitance (effective capacitance at the PVIN and PGND pins) must be sufficient to supply the high switching currents demanded when the high-side MOSFET switches on, while providing minimal input-voltage ripple as a result. This effective capacitance includes any DC-bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage with derating. The capacitor must also have a ripple-current rating greater than the maximum input-current ripple to the device during full load. Use Equation 25 to estimate the input RMS current.

Equation 25.

The minimum input capacitance and ESR values for a given input voltage-ripple specification, V_IN(ripple), are shown in Equation 26 and Equation 27. The input ripple is composed of a capacitive portion (V_RIPPLE(cap)) and a resistive portion (V_RIPPLE(esr)).

Equation 26.

Equation 27.

The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations because of temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power-regulator capacitors because these components have a high capacitance-to-volume ratio and are fairly stable over temperature. The input capacitor must also be selected with consideration of the DC bias. For this example design, a ceramic capacitor with at least a 25-V voltage rating is required to support the maximum input voltage. For this design, allow 0.1-V input ripple for V_RIPPLE(cap) and 0.2-V input ripple for V_RIPPLE(esr). Using Equation 26 and Equation 27, the minimum input capacitance for this design is 64.8 µF, and the maximum ESR is 5 mΩ. For this design example, four 22-μF, 25-V ceramic capacitors, three 6800-pF, 25-V ceramic capacitors, and two additional 100-μF, 25-V low-ESR electrolytic capacitors in parallel were selected for the power stage with sufficient margin.

A high-frequency PVIN-bypass capacitor is suggested to be placed close to power stage to help with ringing reduction. .

8.2.1.2.7 AVIN, BP6, BP3 Bypass Capacitor

The BP3 pin requires a minimum capacitance of 2.2 µF connected to AGND. The BP6 pin should have approximately 4.7 µF of capacitance connected to PGND. The PVIN pin should have approximately 1 µF of capacitance connected to PGND. To filter ripple on the AVIN pin, a small value resistor is recommended to be placed between PVIN pin and AVIN.

8.2.1.2.8 Bootstrap Capacitor Selection

A ceramic capacitor with a value of 0.1 μF must be connected between the BOOT and SW pins for proper operation. TI recommends using a ceramic capacitor with X5R or better grade dielectric. The capacitor should have voltage rating of 25 V or higher.

8.2.1.2.9 R-C Snubber

An R-C snubber must be placed between the switching node and PGND to reduce voltage spikes on the switching node. The power rating of the resistor must be larger than the power dissipation on the resistor with sufficient margin. To balance efficiency and spike level, a 1-nF capacitor and a 1-Ω resistors were selected for this design.

In this example an 0805 resistor was selected, which is rated for 0.125 W.

8.2.1.2.10 Output Voltage Setting and Frequency Compensation Selection

The device uses voltage-mode control with input feedforward. For an in-depth discussion of voltage-mode feedback and control, refer to Under the Hood of Low-Voltage DC/DC Converters (SLUP206). Frequency compensation can be accomplished using standard techniques. TI also provides a compensation calculator tool as part of the WEBENCH® selection simulation services to streamline compensation design. The tool provides the recommended compensation components and approximate bode plots. As a starting point, set the crossover frequency to 1/10 f_SW and 2 to 5 times the resonant frequency of the output LC filter. The phase margin at crossover should be greater than 45°. The resulting plots should be reviewed for a few common considerations. The error-amplifier gain should not hit the error amplifier gain bandwidth product (GBWP). The error-amplifier gain at the switching frequency region is recommended to be approximately 6 dB in general. The high-frequency capacitor from the COMP to FB pins for this device must be above a typical value of 100 pF to 150 pF to lower the high-frequency gain for stability. Use the tool to calculate the system bode plot at different loading conditions to ensure that the phase does not drop below zero prior to crossover, as this condition is known as conditional stability.

The design tool provides the compensation network values as a start point. Measuring the real-system bode plot after the design and adjusting the compensation values accordingly is always recommended. Table 15 lists the compensation values from the tool calculation and optimization based on the measured data.

8.2.1.2.11 Key PMBus Parameter Selection

Some key design parameters for the device can be configured through PMBus, and stored to the non-volatile memory (NVM) for future use.

8.2.1.2.12 Enable, UVLO

The ON_OFF_CONFIG command is used to select the turnon behavior of the converter. For this example, the CNTL pin was used to enable or disable the converter, regardless of the state of OPERATION, as long as the input voltage is present and above the UVLO threshold. The CNTL pin is pulled to the BP6 pin through an internal 6-µA current source if it is floating.

8.2.1.2.13 Soft-Start Time

The TON_RISE command sets the soft-start time. The charging current for the output capacitors must be considered when selecting the soft-start time. In some applications (for example, those with large amounts of output capacitance) this current can lead to false tripping of the overcurrent-protection circuitry if the soft-start time is not properly selected. To avoid false tripping, the output capacitor-charging current should be included when selecting a soft-start time and overcurrent threshold. Use Equation 28 to calculate the capacitor-charging current (I_CAP).

Equation 28.

In this example, the soft-start time is selected to be the default value of 5 ms. In this case, the charging current, I_CAP, is 0.23 A.

8.2.1.2.14 Overcurrent Threshold and Response

The IOUT_OC_FAULT_LIMIT command sets the overcurrent threshold. The device uses inductor middle current value for overcurrent detecting. The current limit should be set to the maximum load current, plus the output capacitor charging current during start-up, plus some margin for load transients and component variation. The amount of margin required depends on the individual application, but a suggested point is between 20% and 40%. For this application, the maximum load current is 35 A, the output capacitor charging current is 0.44 A. This design allows some extra margin, so an overcurrent threshold of 40 A was selected.

The IOUT_OC_FAULT_RESPONE command sets the desired response to an overcurrent event. In this example, the converter is configured to hiccup in the event of an overcurrent. The device can also be configured to latch in the event of an overcurrent.