4 Pin Configuration and Functions

TPS546C25 VBD 33-pin WQFN Package (Top View)

Figure 4-1 VBD 33-pin WQFN Package (Top View)

TPS546C25 VBD 33-pin WQFN Package (Bottom View)

Figure 4-2 VBD 33-pin WQFN Package (Bottom View)

Table 4-1 Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
AGND	26, 31	G	Ground pin, reference point for internal control circuitry.
BOOT	20	P	Supply rail for the high-side gate driver (boost terminal). Connect the bootstrap capacitor from this pin to PHASE pin. A high temperature (X7R) 0.1μF or greater value ceramic capacitor is recommended.
CNTL	21	I	CTRL pin, an active-high input pin that, when asserted high, causes the converter to begin the soft-start sequence for the output voltage rail.
GOSNS	25	I	Negative input of the differential remote sense circuit, connect to the ground sense point on the load side.
ISHARE	1	I/O	ISHARE pin for stackable configuration. Tie this pin to other ISHARE pins in the stack. Do not connect (float) in standalone configuration.
MSEL1	30	I	Use a resistor to AGND to select options for the device. See Pin Strapping.
MSEL2	4	I	Use a resistor to AGND to select configuration options for the device. See Pin Strapping.
PG	2	O	Open-drain power-good indicator.
PGND	8, 9, 16, 17, 33	G	Power ground for the internal power stage.
PHASE	19	I/O	Return for high-side MOSFET driver. Shorted to SW internally. Connect the bootstrap capacitor from BOOT pin to PHASE pin.
PMB_ADDR/VORST#	23	I	The PMBus address, Primary or Secondary, Internal or External Feedback, Over-current Limit, Soft-start, and Fault Response can be set by tying an external resistor between this pin and AGND. See Pin Strapping.
PMB_CLK	27	I	PMBus clock pin, open drain.
PMB_DATA	28	I/O	PMBus bi-directional data pin, open drain.
PVIN	7, 18, 32	P	Power input for both the power stage and the input of the internal VCC LDO.
SMB_ALERT_#	29	O	SMBALERT# as described in the SMBus specification. The pin is open-drain. The SMBALERT# indicator is used in conjunction with the Alert Response Address (ARA). During nominal operation, the SMBALERT# is held high.
SW	10–15	O	Output switching terminal of the power converter. Connect these pins to the output inductor.
TRIGGER	3	I/O	TRIGGER pin for stackable configuration. Tie this pin to other TRIGGER pins in the stack. Do not connect (float) in standalone configuration.
VCC	5	P	Supply for analog control circuitry. Connect a 1Ohm resistor from VDRV to this pin and bypass with a 2.2μF capacitor to AGND. Check layout guidelines for more details.
VDRV	6	—	Internal 5V regulator output and internal connection to the gate drivers. An external 5V bias can be connected to this pin to save the power losses on the internal LDO. A 2.2μF (or 4.7μF), at least 6.3V rating ceramic capacitor is required to be placed from VDRV pin to PGND pins to decouple the noise generated by driver circuitry. Check layout guidelines for more details.
VOSNS	24	I	This pin is VOSNS and is the positive input of the differential remote sense circuit, connect to the Vout sense point on the load side.
VSEL/FB	22	I	When the device is configured to use the internal FB divider, this pin is VSEL. Use a resistor to AGND to select the output voltage. See Table TBD. When the device is configured for an external resister divider, this pin is the feedback pin of the device. Connect this pin to the midpoint of a resistor divider to set the output voltage.

(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.