SLVSH95 July 2024 TPS546C25
ADVANCE INFORMATION
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 D-CAP4 Control
- 6.3.2 Internal VCC LDO and Using an External Bias on VCC Pin and VDRV Pin
- 6.3.3 Input Undervoltage Lockout (UVLO)
- 6.3.4 Differential Remote Sense and Internal, External Feedback Divider
- 6.3.5 Set the Output Voltage and VORST#
- 6.3.6 Start-Up and Shutdown
- 6.3.7 Dynamic Voltage Slew Rate
- 6.3.8 Set Switching Frequency
- 6.3.9 Switching Node (SW)
- 6.3.10 Overcurrent Limit and Low-side Current Sense
- 6.3.11 Negative Overcurrent Limit
- 6.3.12 Zero-Crossing Detection
- 6.3.13 Input Overvoltage Protection
- 6.3.14 Output Overvoltage and Undervoltage Protection
- 6.3.15 Overtemperature Protection
- 6.3.16 Telemetry
- 6.4 Device Functional Modes
- 6.5 Programming
-
7 Register Maps
- 7.1 Conventions for Documenting Block Commands
- 7.2 (01h) OPERATION
- 7.3 (02h) ON_OFF_CONFIG
- 7.4 (03h) CLEAR_FAULTS
- 7.5 (04h) PHASE
- 7.6 (09h) P2_PLUS_WRITE
- 7.7 (0Ah) P2_PLUS_READ
- 7.8 (0Eh) PASSKEY
- 7.9 (10h) WRITE_PROTECT
- 7.10 (15h) STORE_USER_ALL
- 7.11 (16h) RESTORE_USER_ALL
- 7.12 (19h) CAPABILITY
- 7.13 (1Bh) SMBALERT_MASK
- 7.14 (20h) VOUT_MODE
- 7.15 (21h) VOUT_COMMAND
- 7.16 (22h) VOUT_TRIM
- 7.17 (24h) VOUT_MAX
- 7.18 (25h) VOUT_MARGIN_HIGH
- 7.19 (26h) VOUT_MARGIN_LOW
- 7.20 (27h) VOUT_TRANSITION_RATE
- 7.21 (29h) VOUT_SCALE_LOOP
- 7.22 (2Ah) VOUT_SCALE_MONITOR
- 7.23 (2Bh) VOUT_MIN
- 7.24 (33h) FREQUENCY_SWITCH
- 7.25 (35h) VIN_ON
- 7.26 (36h) VIN_OFF
- 7.27 (39h) IOUT_CAL_OFFSET
- 7.28 (40h) VOUT_OV_FAULT_LIMIT
- 7.29 (41h) VOUT_OV_FAULT_RESPONSE
- 7.30 (42h) VOUT_OV_WARN_LIMIT
- 7.31 (43h) VOUT_UV_WARN_LIMIT
- 7.32 (44h) VOUT_UV_FAULT_LIMIT
- 7.33 (45h) VOUT_UV_FAULT_RESPONSE
- 7.34 (46h) IOUT_OC_FAULT_LIMIT
- 7.35 (48h) IOUT_OC_LV_FAULT_LIMIT
- 7.36 (49h) IOUT_OC_LV_FAULT_RESPONSE
- 7.37 (4Ah) IOUT_OC_WARN_LIMIT
- 7.38 (4Fh) OT_FAULT_LIMIT
- 7.39 (50h) OT_FAULT_RESPONSE
- 7.40 (51h) OT_WARN_LIMIT
- 7.41 (55h) VIN_OV_FAULT_LIMIT
- 7.42 (60h) TON_DELAY
- 7.43 (61h) TON_RISE
- 7.44 (64h) TOFF_DELAY
- 7.45 (65h) TOFF_FALL
- 7.46 (78h) STATUS_BYTE
- 7.47 (79h) STATUS_WORD
- 7.48 (7Ah) STATUS_VOUT
- 7.49 (7Bh) STATUS_IOUT
- 7.50 (7Ch) STATUS_INPUT
- 7.51 (7Dh) STATUS_TEMPERATURE
- 7.52 (7Eh) STATUS_CML
- 7.53 (7Fh) STATUS_OTHER
- 7.54 (80h) STATUS_MFR_SPECIFIC
- 7.55 (88h) READ_VIN
- 7.56 (8Bh) READ_VOUT
- 7.57 (8Ch) READ_IOUT
- 7.58 (8Dh) READ_TEMPERATURE_1
- 7.59 (98h) PMBUS_REVISION
- 7.60 (99h) MFR_ID
- 7.61 (9Ah) MFR_MODEL
- 7.62 (9Bh) MFR_REVISION
- 7.63 (ADh) IC_DEVICE_ID
- 7.64 (AEh) IC_DEVICE_REV
- 7.65 (D1h) SYS_CFG_USER1
- 7.66 (D2h) PMBUS_ADDR
- 7.67 (D4h) COMP
- 7.68 (D5h) VBOOT_OFFSET_1
- 7.69 (D6h) STACK_CONFIG
- 7.70 (D8h) PIN_DETECT_OVERRIDE
- 7.71 (D9h) NVM_CHECKSUM
- 7.72 (DAh) READ_TELEMETRY
- 7.73 (79h) STATUS_ALL
- 7.74 (DDh) EXT_WRITE_PROTECTION
- 7.75 (A4h) IMON_CAL
- 7.76 (FCh) FUSION_ID0
- 7.77 (FDh) FUSION_ID1
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
6.3.5 Set the Output Voltage and VORST#
The TPS546C25 offers both internal feedback divider (discrete) and external feedback divider (continuous) output voltage setting options.
With the continuous output voltage setting method, the reference DAC default is set to 0.4V (VBOOT_1 in VBOOT_OFFSET_1) and the external resistor divider is the equivalent to VOUT_SCALE_LOOP = 1. The divider gain is now determined by the external voltage setting resistors as described in Loop Compensation.
With the discrete output voltage setting method, the output voltage is determined by two settings: VOUT_COMMAND and VOUT_SCALE_LOOP. Together, these two parameters determine the converter output voltage. VOUT_COMMAND is used to adjust the reference DAC input to the Error Amplifier and can be in the range of 0.25V to 0.75V. VOUT_SCALE_LOOP selects a voltage divider gain of 1, 0.5, 0.25, or 0.125.
When PMBus or pinstrapping is used to set the regulated voltage, the commanded output voltage in volts is determined by a combination of VOUT_COMMAND, VOUT_TRIM, VOUT_MARGIN_HIGH, VOUT_MARGIN_LOW, and OPERATION commands, as below. As stated in the description of the VOUT_MODE command, the VOUT step size is 1.953mV. The programmed VOUT is computed as:
VOUT = (VOUT_COMMAND + VOUT_TRIM + (VOUT_MARGIN_HIGH – 1) * VOUT_COMMAND × OPERATIONS[5] – (1–m VOUT_MARGIN_LOW) * VOUT_COMMAND × OPERATIONS[4])
The output voltage is related to:
The TPS546C25 defaults to the relative format for the following per bit 7 in VOUT_MODE:
- VOUT_MARGIN_HIGH
- VOUT_MARGIN_LOW
- VOUT_OV_FAULT_LIMIT
- VOUT_OV_WARN_LIMIT
- VOUT_UV_FAULT_LIMIT
- VOUT_UV_WARN_LIMIT
Refer to the detailed description of VOUT_MODE for details.
The range of recommended VOUT_COMMAND values is dependent upon the configured VOUT_SCALE_LOOP. The design does not limit the VOUT_COMMAND value to be within this recommended range. The VOUT_COMMAND value is limited only by VOUT_MAX and VOUT_MIN. The VOUT LSB is 1.953mV, the min VOUT is 0.25V, and the max VOUT is 5.5V.
| VOUT_SCALE_LOOP (V/V) | VOUT Range (V) | VOUT_COMMAND Recommended Range (dec) |
|---|---|---|
| 1 | 0.244 – 0.75 | 125 – 384 |
| 0.5 | 0.244 – 1.5 | 125 – 768 |
| 0.25 | 0.488 – 3 | 250 – 1536 |
| 0.125 | 0.976 – 5.504 | 500 – 2818 |
The TPS546C25 offers a VOUT reset (VORST#) function on the PMB_ADDR/VORST# pin. If PMB_ADDR/VORST# is low and EN_VORST in SYS_CFG_USER1[2] = 1, then VOUT_COMMAND is set to VBOOT at the setting in VOUT_TRANSITION_RATE.
Figure 6-3 VOUT reset by VORST#