ZHCSQY3 march 2023 TPS546D24S
PRODUCTION DATA
CMD Address | 58h |
Write Transaction: | Write Word |
Read Transaction: | Read Word |
Format: | SLINEAR11 per CAPABILITY |
Phased: | Yes |
NVM Back-up: | EEPROM |
Updates: | On-the-fly |
The (58h) VIN_UV_WARN_LIMIT command sets the value of the PVIN pin voltage, in volts, that causes the input voltage detector to indicate an input undervoltage warning.
The (58h) VIN_UV_WARN_LIMIT is a phase command, each phase within a stack will independently detect and report input undervoltage warnings.
In response to an input undervoltage warning condition, the TPS546D24S takes the following action:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RW | RW | RW | RW | RW | RW | RW | RW |
VINUVW_EXP | VINUVW_MAN | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
VINUVW_MAN |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
15:11 | VINUVW_ EXP | RW | 11110b | Linear format two’s complement exponent |
10:0 | VINUVW_ MAN | RW | NVM | Linear format two’s complement mantissa Supported values 2.5 V to 15.5 V |
Attempts to write (58h) VIN_UV_WARN_LIMIT to any value outside those specified as valid will be considered invalid/unsupported data and cause the TPS546D24S to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.