ZHCSPA4 march   2023 TPS548C26

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 绝对最大额定值
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal VCC LDO and Using an External Bias on VCC and VDRV Pin
      2. 7.3.2  Input Undervoltage Lockout (UVLO)
        1. 7.3.2.1 Fixed VCC_OK UVLO
        2. 7.3.2.2 Fixed VDRV UVLO
        3. 7.3.2.3 Fixed PVIN UVLO
        4. 7.3.2.4 Enable
      3. 7.3.3  Set the Output Voltage
      4. 7.3.4  Differential Remote Sense and Feedback Divider
      5. 7.3.5  Start-up and Shutdown
      6. 7.3.6  Loop Compensation
      7. 7.3.7  Set Switching Frequency and Operation Mode
      8. 7.3.8  Switching Node (SW)
      9. 7.3.9  Overcurrent Limit and Low-side Current Sense
      10. 7.3.10 Negative Overcurrent Limit
      11. 7.3.11 Zero-Crossing Detection
      12. 7.3.12 Input Overvoltage Protection
      13. 7.3.13 Output Undervoltage and Overvoltage Protection
      14. 7.3.14 Overtemperature Protection
      15. 7.3.15 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forced Continuous-Conduction Mode
      2. 7.4.2 Auto-Skip Eco-mode Light Load Operation
      3. 7.4.3 Powering the Device from a 12-V Bus
      4. 7.4.4 Powering the Device From a Split-rail Configuration
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Inductor Selection
        2. 8.2.3.2 Input Capacitor Selection
        3. 8.2.3.3 Output Capacitor Selection
        4. 8.2.3.4 VCC and VRDV Bypass Capacitor
        5. 8.2.3.5 BOOT Capacitor Selection
        6. 8.2.3.6 PG Pullup Resistor Selection
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Thermal Performance on TPS548C26 Evaluation Board
  9. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  10. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 Typical Characteristics

GUID-20220812-SS0I-1M6B-9G65-CJNX6CKKM3CG-low.svg
PVIN = 12 V VCC = Internal LDO VOUT = 1.1 V
MODE = FCCM
Figure 6-1 Efficiency vs Output Current
GUID-20220812-SS0I-4L71-2T7C-DW5PSMXQZG7S-low.svg
PVIN = 12 V VCC = External 5 V Bias VOUT = 1.1 V
MODE = FCCM
Figure 6-3 Efficiency vs Output Current
GUID-20220812-SS0I-QDPT-HCTK-2VPM3VMPNBG8-low.svg
PVIN = 12 V VCC = External 5 V Bias VOUT = 1.1 V
MODE = DCM
Figure 6-5 Efficiency vs Output Current
GUID-20220812-SS0I-VFP9-JKR9-Z7M8MJWQ1ZJD-low.svg
PVIN = 12 V VCC = Internal LDO VOUT = 1.1 V
MODE = FCCM
Figure 6-2 Power Dissipation vs Output Current
GUID-20220812-SS0I-1NGH-SR8C-3JK9THDXLBJD-low.svg
PVIN = 12 V VCC = External 5 V Bias VOUT = 1.1 V
MODE = FCCM
Figure 6-4 Power Dissipation vs Output Current
GUID-20220812-SS0I-5BQW-XTMT-HMLMMTBQBFG4-low.svg
PVIN = 12 V VCC = External 5 V Bias VOUT = 1.1 V
MODE = DCM
Figure 6-6 Power Dissipation vs Output Current
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