The TPS549B22 employs an artificial ramp generator that stabilizes the loop. The ramp amplitude is automatically adjusted as a function of selected switching frequency (f_SW) The ramp amplitude is a function of duty cycle (V_OUT-to-V_IN ratio). Consequently, two additional pin-strap bits are provided for fine tuning the internal ramp amplitude. The device uses an improved D-CAP3 control mode architecture that incorporates a steady-state error integrator. The slow integrator improves the output voltage DC accuracy greatly and presents minimal impact to small signal transient response. To further enhance the small signal stability of the control loop, the device uses a modified ramp generator that supports a wider range of output LC stage.