ZHCSMV2A December 2020 – December 2021 TPS55288-Q1
PRODUCTION DATA
The acknowledge takes place after every byte. The acknowledge bit allows the receiver to signal the transmitter that the byte was successfully received and another byte may be sent. All clock pulses, including the acknowledge 9th clock pulse, are generated by the master.
The transmitter releases the SDA line during the acknowledge clock pulse so the receiver can pull the SDA line to low level and it remains stable low level during the high level period of this clock pulse.
The Not Acknowledge signal is when SDA remains high level during the 9th clock pulse. The master can then generate either a STOP to abort the transfer or a repeated START to start a new transfer.