ZHCSB48B May 2013 – January 2019 TPS55330
PRODUCTION DATA.
The switching frequency is set by a resistor (RFREQ) connected to the FREQ pin of the TPS55330. The relationship between the timing resistance RFREQ and frequency is shown in the Figure 5. Do not leave this pin open. A resistor must always be connected from the FREQ pin to ground for proper operation. The resistor value required for a desired frequency can be calculated using Equation 1.
For the given resistor value, the corresponding frequency can be calculated by Equation 2.
The TPS55330 switching frequency can be synchronized to an external clock signal that is applied to the SYNC pin. The required logic levels of the external clock are shown in the specification table. The recommended duty cycle of the clock is in the range of 10% to 90%. A resistor must be connected from the FREQ pin to ground when the converter is synchronized to the external clock and the external clock frequency must be within ±20% of the corresponding frequency set by the resistor. For example, if the frequency programmed by the FREQ pin resistor is 600kHz, the external clock signal should be in the range of 480kHz to 720kHz.
With a switching frequency below 280 kHz (typical) after the TPS55330 enters frequency foldback as described in the section, if a load remains when the overcurrent condition is removed the output may not recover to the set value. For the output to return to the set value the load must be removed completely or the TPS55330 power cycled with the EN pin or VIN pin. Select a nominal switching frequency of 350 kHz for quicker recovery from frequency foldback.