ZHCSCK0C June 2014 – September 2021 TPS55340-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
TPS55340-Q1 Boost Converter
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 Custom Design With WEBENCH® Tools
- 8.2.1.2.2 Selecting the Switching Frequency (R4)
- 8.2.1.2.3 Determining the Duty Cycle
- 8.2.1.2.4 Selecting the Inductor (L1)
- 8.2.1.2.5 Computing the Maximum Output Current
- 8.2.1.2.6 Selecting the Output Capacitor (C8 through C10)
- 8.2.1.2.7 Selecting the Input Capacitors (C2 and C7)
- 8.2.1.2.8 Setting the Output Voltage (R1 and R2)
- 8.2.1.2.9 Setting the Soft-Start Time (C7)
- 8.2.1.2.10 Selecting the Schottky Diode (D1)
- 8.2.1.2.11 Compensating the Control Loop (R3, C4, and C5)
- 8.2.1.3 Application Curves
- 8.2.2
TPS55340-Q1 SEPIC Converter
- 8.2.2.1 Design Requirements
- 8.2.2.2
Detailed Design Procedure
- 8.2.2.2.1 Selecting the Switching Frequency (R4)
- 8.2.2.2.2 Duty Cycle
- 8.2.2.2.3 Selecting the Inductor (L1)
- 8.2.2.2.4 Calculating the Maximum Output Current
- 8.2.2.2.5 Selecting the Output Capacitor (C8 Through C10)
- 8.2.2.2.6 Selecting the Series Capacitor (C6)
- 8.2.2.2.7 Selecting the Input Capacitor (C2 and C7)
- 8.2.2.2.8 Selecting the Schottky Diode (D1)
- 8.2.2.2.9 Setting the Output Voltage (R1 and R2)
- 8.2.2.2.10 Setting the Soft-Start Time (C3)
- 8.2.2.2.11 Mosfet Rating Considerations
- 8.2.2.2.12 Compensating the Control Loop (R3 and C4)
- 8.2.2.3 Application Curves
- 8.2.1
TPS55340-Q1 Boost Converter
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
8.2.2.2.5 Selecting the Output Capacitor (C8 Through C10)
To meet the 60-mV ripple specification, the minimum output capacitance is calculated to be 22.5 µF with Equation 47. This design uses ceramic output capacitors and the effects of ESR are ignored. To meet the transient response of 500 mA with less than 480-mV voltage change and a 7-kHz control loop bandwidth, the minimum output capacitance is calculated to be 23.7 µF using Equation 48. The RMS current is calculated to be 1.44 A using Equation 24. The output capacitors used in this design are three 22-µF, 25-V X7R 1210 ceramic capacitors. With voltage derating, the effective total output capacitance is estimated to be 30.4 µF.
