ZHCSCK0C June   2014  – September 2021 TPS55340-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operation
      2. 7.3.2 Switching Frequency
      3. 7.3.3 Overcurrent Protection and Frequency Foldback
        1. 7.3.3.1 Minimum On Time and Pulse Skipping
      4. 7.3.4 Voltage Reference and Setting Output Voltage
      5. 7.3.5 Soft Start
      6. 7.3.6 Slope Compensation
      7. 7.3.7 Enable and Thermal Shutdown
      8. 7.3.8 Undervoltage Lockout (UVLO)
      9. 7.3.9 Thermal Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 2.9 V (Minimum VI)
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Operation at Light Loads
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS55340-Q1 Boost Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency (R4)
          3. 8.2.1.2.3  Determining the Duty Cycle
          4. 8.2.1.2.4  Selecting the Inductor (L1)
          5. 8.2.1.2.5  Computing the Maximum Output Current
          6. 8.2.1.2.6  Selecting the Output Capacitor (C8 through C10)
          7. 8.2.1.2.7  Selecting the Input Capacitors (C2 and C7)
          8. 8.2.1.2.8  Setting the Output Voltage (R1 and R2)
          9. 8.2.1.2.9  Setting the Soft-Start Time (C7)
          10. 8.2.1.2.10 Selecting the Schottky Diode (D1)
          11. 8.2.1.2.11 Compensating the Control Loop (R3, C4, and C5)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 TPS55340-Q1 SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Selecting the Switching Frequency (R4)
          2. 8.2.2.2.2  Duty Cycle
          3. 8.2.2.2.3  Selecting the Inductor (L1)
          4. 8.2.2.2.4  Calculating the Maximum Output Current
          5. 8.2.2.2.5  Selecting the Output Capacitor (C8 Through C10)
          6. 8.2.2.2.6  Selecting the Series Capacitor (C6)
          7. 8.2.2.2.7  Selecting the Input Capacitor (C2 and C7)
          8. 8.2.2.2.8  Selecting the Schottky Diode (D1)
          9. 8.2.2.2.9  Setting the Output Voltage (R1 and R2)
          10. 8.2.2.2.10 Setting the Soft-Start Time (C3)
          11. 8.2.2.2.11 Mosfet Rating Considerations
          12. 8.2.2.2.12 Compensating the Control Loop (R3 and C4)
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10.1 Layout Guidelines

As for all switching power supplies, especially those with high frequency and high switch current, printed circuit board (PCB) layout is an important design step. If the layout is not carefully designed, the regulator can suffer from instability as well as noise problems. The following guidelines are recommended for good PCB layout.

  • To maximize efficiency, keep switch rise and fall times as short as possible.
  • To prevent radiation of high frequency resonance problems, use proper layout of the high frequency switching path.
  • Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize inter-plane coupling.
  • The high current path including the internal MOSFET switch, Schottky diode, and output capacitor, contains nanosecond rise times and fall times. Keep these rise times and fall times as short as possible.
  • Place the input capacitor as close to the VIN pin and the AGND pin as possible to reduce the IC supply ripple.
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |