ZHCSCK0C June   2014  – September 2021 TPS55340-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operation
      2. 7.3.2 Switching Frequency
      3. 7.3.3 Overcurrent Protection and Frequency Foldback
        1. 7.3.3.1 Minimum On Time and Pulse Skipping
      4. 7.3.4 Voltage Reference and Setting Output Voltage
      5. 7.3.5 Soft Start
      6. 7.3.6 Slope Compensation
      7. 7.3.7 Enable and Thermal Shutdown
      8. 7.3.8 Undervoltage Lockout (UVLO)
      9. 7.3.9 Thermal Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 2.9 V (Minimum VI)
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Operation at Light Loads
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS55340-Q1 Boost Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency (R4)
          3. 8.2.1.2.3  Determining the Duty Cycle
          4. 8.2.1.2.4  Selecting the Inductor (L1)
          5. 8.2.1.2.5  Computing the Maximum Output Current
          6. 8.2.1.2.6  Selecting the Output Capacitor (C8 through C10)
          7. 8.2.1.2.7  Selecting the Input Capacitors (C2 and C7)
          8. 8.2.1.2.8  Setting the Output Voltage (R1 and R2)
          9. 8.2.1.2.9  Setting the Soft-Start Time (C7)
          10. 8.2.1.2.10 Selecting the Schottky Diode (D1)
          11. 8.2.1.2.11 Compensating the Control Loop (R3, C4, and C5)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 TPS55340-Q1 SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Selecting the Switching Frequency (R4)
          2. 8.2.2.2.2  Duty Cycle
          3. 8.2.2.2.3  Selecting the Inductor (L1)
          4. 8.2.2.2.4  Calculating the Maximum Output Current
          5. 8.2.2.2.5  Selecting the Output Capacitor (C8 Through C10)
          6. 8.2.2.2.6  Selecting the Series Capacitor (C6)
          7. 8.2.2.2.7  Selecting the Input Capacitor (C2 and C7)
          8. 8.2.2.2.8  Selecting the Schottky Diode (D1)
          9. 8.2.2.2.9  Setting the Output Voltage (R1 and R2)
          10. 8.2.2.2.10 Setting the Soft-Start Time (C3)
          11. 8.2.2.2.11 Mosfet Rating Considerations
          12. 8.2.2.2.12 Compensating the Control Loop (R3 and C4)
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

VI = 5 V, TJ = –40°C to 150°C, unless otherwise noted. Typical values are at TA = 25°C.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENT
VIInput voltage range2.938V
IQOperating quiescent current into VINDevice nonswitching, V(FB) = 2 V0.5mA
IL(sd)Shutdown currentEN = GND2.710µA
V(UVLO)Undervoltage lockout thresholdVI(f)2.52.7V
VhysUndervoltage lockout hysteresis120140160mV
ENABLE AND REFERENCE CONTROL
V(EN)(r)EN threshold voltageEN rising input0.91.081.3V
V(EN)(f)EN threshold voltageEN falling input0.740.921.125V
V(EN)(hys)EN threshold hysteresis0.16V
R(EN)EN pulldown resistor4009501600kΩ
toffShutdown delay, SS dischargeEN high to low1ms
V(SYNC)HSYN logic high voltage1.2
V(SYNC)LSYN logic low voltage0.4V
VOLTAGE AND CURRENT CONTROL
VrefVoltage feedback regulation voltage1.2041.2291.254V
TA = 25°C1.221.2291.238
IIB(FB)Voltage feedback input bias currentTA = 25°C1.620nA
I(COMP_sink)COMP pin sink currentV(FB) = Vref + 200 mV, V(COMP) = 1 V42µA
IS(COMP)COMP pin source currentV(FB) = Vref – 200 mV, V(COMP) = 1 V42µA
VC(COMP)COMP pin clamp voltageHigh clamp, V(FB) = 1 V3.1V
Low clamp, V(FB) = 1.5 V0.75
V(COMP_th)COMP pin thresholdDuty cycle = 0%1.04V
gm(ea)Error amplifier transconductance240360440µmho
RO(ea)Error amplifier output resistance10MΩ
ƒ(ea)Error amplifier crossover frequency500kHz
FREQUENCY
ƒFrequencyR(FREQ) = 480 kΩ7594130kHz
R(FREQ) = 80 kΩ460577740
R(FREQ) = 40 kΩ92011401480
R(FREQ) = 18 kΩ226125492837
DmaxMaximum duty cycleV(FB) = 1 V, R(FREQ) = 80 kΩ89%96%
V(FREQ)FREQ pin voltage1.25V
tW(on)minMinimum on pulse widthR(FREQ) = 80 kΩ77107ns
POWER SWITCH
rDS(on)N-channel MOSFET on-resistanceVI = 5 V60110mΩ
VI = 3 V70120
ILN_NFETN-channel leakage currentVDS = 25 V, TA = 25°C2.1µA
OCP AND SS
ILIMN-channel MOSFET current limitD = Dmax5.256.67.75A
IB(SS)Soft-start bias currentV(SS) = 0 V6µA
THERMAL SHUTDOWN
TsdThermal shutdown threshold165°C
ThysThermal shutdown threshold hysteresis15°C
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