米6体育平台手机版

ZHCSNA3 October 2021 TPS562212

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

DRL|8
- MPCS002E

散热焊盘机械数据 (封装 | 引脚)

订购信息

zhcsna3_oa

8.2.2.4 Output Capacitor Selection

After selecting the inductor, the output capacitor needs to be optimized. The LC filter used as the output filter has double pole at:

Equation 16.

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180°. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. A high frequency zero is introduced by the internal circuit that reduces the gain roll off to –20 dB per decade and increases the phase to 90° one decade above the zero frequency. The inductor and capacitor for the output filter must be selected so that the double pole of f_P is located below the high frequency zero, but close enough. The phase boost provided by the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement, it is better to make the L1 × C_{OUT_E} value meet the range of the L1 × C_{OUT_E} value recommended in Table 8-2.

Table 8-2 Recommended Component Values

OUTPUT VOLTAGE (V)⁽¹⁾	R8⁽²⁾ (kΩ)	R9 (kΩ)	L1⁽³⁾ (µH)	C_OUT⁽⁴⁾ (µF)	RANGE OF L1 × C_{OUT_E}⁽⁵⁾ (μH × μF)	C7⁽⁶⁾ (pF)
0.76	5.36	20.0	0.68	2 × 22	17–130	—
1.05	15.0	20.0	1.0	2 × 22	17–130	10–100
1.8	40.0	20.0	1.5	1 × 22	15–160	10–100
2.5	31.6	10.0	1.8	1 × 22	15–160	10–100
3.3	45.3	10.0	2.2	1 × 22	15–160	10–100
5	73.2	10.0	3.3	1 × 22	15–160	10–100

(1) Use the recommended L1 and C_OUT combination of the higher and closest output rail for the unlisted output rails.

(2) R8 = 10 kΩ and R9 = Float for V_OUT = 0.6 V

(3) Inductance values are calculated based on V_IN=18 V, but they can also be used for other input voltages. Users can calculate their preferred inductance value per Equation 12.

(4) C_OUT is the sum of nominal output capacitance. 22-μF, 0805, 10-V or higher specifications capacitors are recommended.

(5) C_{OUT_E} is the effective value after derating. The value of L1 × C_{OUT_E} is recommended to be within the range.

(6) R6 and C7 can be used to improve the load transient response and improve the loop-phase margin.

The capacitor value and ESR determine the amount of output voltage ripple. The device is intended for use with ceramic or other low-ESR capacitors. Use Equation 17 to determine the required RMS current rating for the output capacitor.

Equation 17.

Two Murata GRM21BR61C226ME44L 22-μF, 0805, 16-V output capacitors are used for this design. From the data sheet, the estimated DC derating rate is 66.8% at room temperature with AC voltage of 0.2 V. The total output effective capacitance is approximately 14.7 μF. The value of L1 × C_{OUT_E} is 33 μH × μF, which is within the recommended range.