Use a four-layer PCB for good thermal performance
and with maximum ground plane. 55-mm × 60-mm, four-layer PCB with 2-1-1-2 oz
copper is used as example.
Place the decoupling capacitors right across VIN
and VCC as close as possible.
Place an output inductor and capacitors with IC
at the same layer. SW routing must be as short as
possible to minimize EMI, and must be a width
plane to carry big current. Enough vias must be
added to the PGND connection of the output
capacitor and as close to the output pin as
possible.
Place a BST resistor and capacitor with IC at the
same layer, close to BST and SW plane. TI recommends a 15-mil width trace to
reduce line parasitic inductance.
Feedback must be routed away
from the switching node, BST node, or other high frequency signal.
The VIN trace must be wide to reduce the trace
impedance and provide enough current
capability.
Place multiple vias under the device near VIN and PGND and near input capacitors
to reduce parasitic inductance and improve thermal
performance.