5 Pin Configuration and Functions

Figure 5-1 RNN Package18-Pin VQFN

Table 5-1 Pin Functions

PIN		I/O	DESCRIPTION
NO.	NAME	I/O	DESCRIPTION
1	BOOT	I	Supply input for the gate drive voltage of the high-side MOSFET. Connect a 0.1-µF bootstrap capacitor between BOOT and SW.
2,11	VIN	P	Input voltage supply pin for the control circuitry. Connect the input decoupling capacitors between VIN and PGND.
3, 4, 5, 8, 9, 10	PGND	G	Power GND terminal for the controller circuit and the internal circuitry.
6, 7	SW	O	Switch node terminal. Connect the output inductor to this pin.
12	AGND	G	Ground of internal analog circuitry. Connect AGND to PGND plane.
13	FB	I	Converter feedback input. Connect to the resistor divider between output voltage and AGND.
14	SS	O	Soft-Start time selection pin. Connecting an external capacitor sets the soft-start time and if no external capacitor is connected, the soft-start time in 1ms.
15	EN	I	Enable input control, leaving this pin floating enables the converter. It can also be used to adjust the input UVLO by connecting to the resistor divider between VIN and EN.
16	PGOOD	O	Open Drain Power Good Indicator, it is asserted low if output voltage is out of PGOOD threshold, Overvoltage or if the device is under thermal shutdown, EN shutdown or during soft start.
17	VREG5	I/O	4.7-V internal LDO output which can also be driven externally with a 5V input. This pin supplies voltage to the internal circuitry and gate driver. Bypass this pin with a 4.7-μF capacitor.
18	MODE	I	Switching Frequency, Current Limit selection and Light load operation mode selection pin. Connect this pin to a resistor divider from VREG5 and AGND for different MODE options shown in table 4.