SUPPLY VOLTAGE (VIN PIN) |
| Operating input voltage |
| 3.5 |
| 60 |
V |
| Internal undervoltage lockout threshold |
No voltage hysteresis, rising and falling |
| 2.5 |
| V |
| Shutdown supply current |
EN = 0 V, 25°C, 3.5 V ≤ VIN ≤ 60 V |
| 1.3 |
4 |
μA |
EN = 0 V, 125°C, 3.5 V ≤ VIN ≤ 60 V |
| 1.9 |
6.5 |
| Operating: nonswitching supply current |
VSENSE = 0.83 V, VIN = 12 V, 25°C |
| 116 |
136 |
μA |
ENABLE AND UVLO (EN PIN) |
| Enable threshold voltage |
No voltage hysteresis, rising and falling, 25°C |
1.15 |
1.25 |
1.36 |
V |
| Input current |
Enable threshold +50 mV |
| –3.8 |
| μA |
Enable threshold –50 mV |
| –0.9 |
|
| Hysteresis current |
| | –2.9 |
| μA |
VOLTAGE REFERENCE |
| Voltage reference |
| 0.792 |
0.8 |
0.808 |
V |
HIGH-SIDE MOSFET |
| On-resistance |
VIN = 3.5 V, BOOT-PH = 3 V |
| 300 |
| mΩ |
VIN = 12 V, BOOT-PH = 6 V |
| 200 |
410 |
ERROR AMPLIFIER |
| Input current |
| | 50 |
| nA |
| Error amplifier transconductance (gM) |
–2 μA < ICOMP < 2 μA, VCOMP = 1 V |
| 97 |
| μMhos |
| Error amplifier transconductance (gM) during slow start |
–2 μA < ICOMP < 2 μA, VCOMP = 1 V, VVSENSE = 0.4 V |
| 26 |
| μMhos |
| Error amplifier dc gain |
VVSENSE = 0.8 V |
| 10,000 |
| V/V |
| Error amplifier bandwidth |
| | 2700 |
| kHz |
| Error amplifier source/sink |
V(COMP) = 1 V, 100 mV overdrive |
| ±7 |
| μA |
| COMP to switch current transconductance |
| | 1.9 |
| A/V |
CURRENT LIMIT |
| Current limit threshold |
VIN = 12 V, TJ = 25°C |
0.6 |
0.94 |
| A |
THERMAL SHUTDOWN |
| Thermal shutdown |
| | 182 |
| °C |
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN) |
| Switching frequency using RT mode |
VIN = 12 V |
100 |
| 2500 |
kHz |
fSW |
Switching frequency |
VIN = 12 V, RT = 200 kΩ |
450 |
581 |
720 |
kHz |
| Switching frequency using CLK mode |
VIN = 12 V |
300 |
| 2200 |
kHz |
| Minimum CLK input pulse width |
| | 40 |
| ns |
| RT/CLK high threshold |
VIN = 12 V |
| 1.9 |
2.2 |
V |
| RT/CLK low threshold |
VIN = 12 V |
0.45 |
0.7 |
| V |
| RT/CLK falling edge to PH rising edge delay |
Measured at 500 kHz with RT resistor in series |
| 60 |
| ns |
| PLL lock in time |
Measured at 500 kHz |
| 100 |
| μs |
SLOW START AND TRACKING (SS/TR) |
| Charge current |
VSS/TR = 0.4 V |
| 2 |
| μA |
| SS/TR-to-VSENSE matching |
VSS/TR = 0.4 V |
| 45 |
| mV |
| SS/TR-to-reference crossover |
98% nominal |
| 1.0 |
| V |
| SS/TR discharge current (overload) |
VSENSE = 0 V, V(SS/TR) = 0.4 V |
| 112 |
| μA |
| SS/TR discharge voltage |
VSENSE = 0 V |
| 54 |
| mV |
POWER GOOD (PWRGD PIN) |
PWRGDTH |
PWRGD switching threshold as % of the nominal VSENSE |
VSENSE falling (fault) |
| 92 |
| % of VSENSE |
VSENSE rising (good) |
| 94 |
|
VSENSE rising (fault) |
| 109 |
|
VSENSE falling (good) |
| 107 |
|
| Hysteresis |
VSENSE falling and rising |
| 2 |
| % of VSENSE |
| Output high leakage |
VSENSE = VREF, V(PWRGD) = 5.5 V, 25°C |
| 10 |
| nA |
| On resistance |
I(PWRGD) = 3 mA, VSENSE < 0.79 V |
| 50 |
| Ω |
| Minimum VIN for defined output |
V(PWRGD) < 0.5 V, II(PWRGD) = 100 μA |
| 0.95 |
1.5 |
V |