SLVS279D March 2000 – August 2015 TPS61000 , TPS61002 , TPS61005 , TPS61006 , TPS61007
PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current.
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
The maximum junction temperature (TJ) of the TPS6100x devices is 125°C. The thermal resistance of the 10-pin MSOP package (DGS) is RθJA = 161°C/W. Specified regulator operation is assured to a maximum ambient temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 248 mW. More power can be dissipated if the maximum ambient temperature of the application is lower.
Under normal operating conditions, the sum of all losses generated inside the converter IC is less than 50 mW, which is well below the maximum allowed power dissipation of 248 mW as calculated in Equation 8. Therefore, power dissipation is given no special attention.
Table 6 shows where the losses inside the converter are generated.
LOSSES | AMOUNTS |
---|---|
Conduction losses in the switch | 36 mW |
Switching losses | 8 mW |
Gate drive losses | 2.3 mW |
Quiescent current losses | < 1 mW |
TOTAL | < 50 mW |