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SLVS427D JUNE 2002 – May 2015 TPS61120 , TPS61121 , TPS61122

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

PW|16
RSA|16

散热焊盘机械数据 (封装 | 引脚)

RSA|16
- QFND072M

订购信息

slvs427d_pm

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range unless otherwise noted⁽¹⁾

		MIN	MAX	UNIT
Input voltage	FB	–0.3	3.6	V
	SWN, SWP	–0.3	10	V
	VOUT, LDOIN, LDOOUT, LDOEN, LDOSENSE, PGOOD, LBO, VBAT, LBI, SKIPEN, EN	–0.3	7	V
Maximum junction temperature T_J		–40	150	°C
Storage temperature T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±750	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

	MIN	MAX	UNIT
Supply voltage at VBAT, V_I	1.8	5.5	V
Operating ambient temperature range, T_A	–40	85	°C
Operating virtual junction temperature range, T_J	–40	125	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS61120, TPS61121, TPS61122	TPS61120	UNIT
		PW (TSSOP)	RSA (VQFN)
		16 PINS	16 PINS
R_θJA	Junction-to-ambient thermal resistance	100.5	33.9	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	35.8	36.3	°C/W
R_θJB	Junction-to-board thermal resistance	45.4	11	°C/W
ψ_JT	Junction-to-top characterization parameter	2.6	0.5	°C/W
ψ_JB	Junction-to-board characterization parameter	44.8	11	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	2.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted)

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
DC-DC STAGE
V_I	Input voltage range			1.8		5.5	V
V_O	Adjustable output voltage range (TPS61120)			2.5		5.5	V
V_ref	Reference voltage			485	500	515	mV
f	Oscillator frequency			400	500	600	kHz
I_SW	Switch current limit		VOUT= 3.3 V	1100	1300	1600	mA
	Startup current limit				0.4 * I_SW		mA
	SWN switch on resistance		VOUT= 3.3 V		200	350	mΩ
	SWP switch on resistance		VOUT= 3.3 V		250	500	mΩ
	Total accuracy (including line and load regulation)			-3%		±3%
	DC-DC quiescent current	into VBAT	I_O= 0 mA, V_EN= VBAT = 1.8 V, VOUT = 3.3 V, ENLDO = 0		10	25	µA
	DC-DC quiescent current	into VOUT	I_O= 0 mA, V_EN= VBAT = 1.8 V, VOUT = 3.3 V, ENLDO = 0		10	25	µA
	DC-DC shutdown current		V_EN= 0 V		0.2	1	µA
LDO STAGE
V_I(LDO)	Input voltage range			1.8		7	V
V_O(LDO)	Adjustable output voltage range (TPS61120)			0.9		5.5	V
I_O(max)	Output current			200	320		mA
	LDO short circuit current limit					500	mA
	Minimum voltage drop		I_O= 200 mA			300	mV
	Total accuracy (including line and load regulation)		I_O≥ 1 mA			±3%
	Line regulation		LDOIN change from 1.8 V to 2.6 V at 100 mA, LDOOUT = 1.5 V			0.6%
	Load regulation		Load change from 10% to 90%, LDOIN = 3.3 V			0.6%
	LDO quiescent current		LDOIN = 7 V, VBAT = 1.8 V, EN = VBAT		20	30	µA
	LDO shutdown current		LDOEN = 0 V, LDOIN = 7 V		0.1	1	µA
CONTROL STAGE
V_IL	LBI voltage threshold		V_LBI voltage decreasing	490	500	510	mV
	LBI input hysteresis				10		mV
	LBI input current		EN = VBAT or GND		0.01	0.1	µA
	LBO output low voltage		V_O = 3.3 V, I_OI = 100 µA		0.04	0.4	V
	LBO output low current				100		µA
	LBO output leakage current		V_LBO= 7 V		0.01	0.1	µA
V_IL	EN, SKIPEN input low voltage					0.2 × VBAT	V
V_IH	EN, SKIPEN input high voltage			0.8 × VBAT			V
V_IL	LDOEN input low voltage					0.2 × V_LDOIN	V
V_IH	LDOEN input high voltage			0.8 × V_LDOIN			V
	EN, SKIPEN input current		Clamped on GND or VBAT		0.01	0.1	µA
	Power-Good threshold		V_O = 3.3 V	0.9*V_O	0.92*V_O	0.95*V_O	V
	Power-Good delay				30		µs
	Power-Good output low voltage		V_O = 3.3 V, I_OI = 100 µA		0.04	0.4	V
	Power-Good output low current				100		µA
	Power-Good output leakage current		V_PG= 7 V		0.01	0.1	µA
	Overtemperature protection				140		°C
	Overtemperature hysteresis				20		°C

7.6 Typical Characteristics

Table 2. Table of Graphs

		FIGURE
BOOST CONVERTER
Maximum output current	vs Input voltage	Figure 1, Figure 2
Efficiency	vs Output current (TPS61120) (V_O = 2.5 V, V_I = 1.8 V)	Figure 3
	vs Output current (TPS61121) (V_O = 3.3 V, V_I = 1.8 V, 2.4 V)	Figure 4
	vs Output current (TPS61120) (V_O = 5.0 V, V_I = 2.4 V, 3.3 V)	Figure 5
	vs Input voltage (TPS61121)	Figure 6
Output voltage	vs Output current (TPS61121)	Figure 7
No-load supply current into VBAT	vs Input voltage (TPS61121)	Figure 8
No-load supply current into VOUT	vs Input voltage (TPS61121)	Figure 9
LDO
Maximum output current	vs Input voltage (V_O = 2.5 V, 3.3 V)	Figure 10
Maximum output current	vs Input voltage (V_O = 1.5 V, 1.8 V)	Figure 11
Output voltage	vs Output current (TPS61122)	Figure 12
Dropout voltage	vs Output current (TPS61121, TPS61122)	Figure 13
Supply current into LDOIN	vs LDOIN input voltage (TPS61121)	Figure 14
PSRR	vs Frequency (TPS61121)	Figure 15