SLVS431C june 2002 – September 2015 TPS61130 , TPS61131
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS6113x DC-DC converters are intended for systems powered by a dual or triple cell NiCd or NiMH battery with a typical terminal voltage from 1.8 V to 5.5 V. They can also be used in systems powered by one-cell Li-Ion with a typical stack voltage from 2.5 V to 4.2 V. Additionally, two or three primary and secondary alkaline battery cells can be the power source in systems where the TPS6113x is used. The built-in LDO can be used to generate a second output voltage derived from the DC-DC converter output, from the battery, or from another power source like an AC adapter or a USB power rail. The maximum programmable output voltage at the LDO is 5.5 V.
Table 2 shows the design parameters for Figure 15.
DESIGN PARAMETERS | EXAMPLE VALUES |
---|---|
Input voltage range | 1.8 V to 5.5 V |
Output voltage boost | 3.3 V |
Output voltage LDO | 1.5 V |
Output voltage ripple | ±3% VOUT |
The TPS6113x DC-DC converters are intended for systems powered by a dual up to 4 cell NiCd or NiMH battery with a typical terminal voltage from 1.8 V to 6.5 V. They can also be used in systems powered by one-cell Li-Ion with a typical stack voltage from 2.5 V to 4.2 V. Additionally, two up to four primary alkaline battery cells can be the power source in systems where the TPS6113x is used.
The output voltage of the TPS61130 DC-DC converter section can be adjusted with an external resistor divider. The typical value of the voltage on the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 μA and the voltage across R6 is typically 500 mV. Based on those two values, the recommended value for R6 should be lower than 500 kΩ, to set the divider current at 1 μA or higher. Because of internal compensation circuitry the value for this resistor should be in the range of 200 kΩ. From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using Equation 1:
If as an example, an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R3. If for any reason the value for R6 is chosen significantly lower than 200 kΩ additional capacitance in parallel to R3 is recommended. The required capacitance value can be easily calculated using Equation 2.
Programming the output voltage of the LDO follows almost the same rules as at the dc/dc converter section. The maximum recommended output voltage of the LDO is 5.5 V. Because reference and internal feedback circuitry are similar, as they are at the DC-DC converter section, R4 also should be in the 200-kΩ range. The calculation of the value of R5 can be done using the following Equation 3:
If as an example, an output voltage of 1.5 V is needed, a 360-kΩ resistor should be chosen for R5.
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 μA, and the voltage across R2 is equal to the LBI voltage threshold that is generated on-chip, which has a value of 500 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be calculated using Equation 4.
The output of the low battery supervisor is a simple open-drain output that goes active low if the dedicated battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 MΩ. The maximum voltage which is used to pull up the LBO outputs should not exceed the output voltage of the DC-DC converter. If not used, the LBO pin can be left floating or tied to GND.
A SEPIC converter normally requires three main passive components for storing energy during the conversion. Two inductors, a flying capacitor, and a storage capacitor at the output are required. To select the two inductors, TI recommends keeping the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. For example, the typical current limit threshold of the TPS6113x's switch is 1300 mA at an output voltage of 3.3 V. The highest peak current through the switch is the sum of the two inductor currents and depends on the output load, the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current of each inductor can be done using Equation 5:
For example, for an output current of 300 mA at 3.3 V, at least 680 mA of average current flows through each of the inductors at a minimum input voltage of 1.8 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is advisable to work with a ripple of around ±20% of the average inductor current. A smaller ripple reduces the magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way, regulation time at load changes rises. In addition, a larger inductor increases the total system costs. With those parameters, it is possible to calculate the value for the inductor by using Equation 6:
Parameter f is the switching frequency andΔ IL is the ripple current in the inductor, that is, 40% Δ IL. In this example, the desired inductance is in the range of 20 μH. With this calculated value and the calculated currents, it is possible to choose a suitable inductor. In typical applications, TI recommends an inductance of 22 μH. The device has been optimized to operate with inductance values from 10 μH to 47 μH. Nevertheless operation with higher inductance values may be possible in some applications. TI recommends a detailed stability analysis. Take care so that load transients and losses in the circuit can lead to higher currents as estimated in Equation 6. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency.
The following inductor series from different suppliers have been used with the TPS6113X converters:
VENDOR | RECOMMENDED INDUCTOR SERIES | COUPLED INDUCTOR SERIES |
---|---|---|
Coilcraft | LPS4012 | LPD4012 |
LPS3015 | — | |
Cooper Electronics Technologies | DR73 | DRQ73 |
DR74 | DRQ74 | |
EPCOS | B82462G | — |
Sumida | CDRH5D18 | — |
Wurth Electronik | 7447789___ | 744878220 |
7447779___ | 744877220 |
TI recommends at least a 10-μF input capacitor to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in parallel, placed close to the IC, is recommended.
In the normal operating mode, the flying capacitor (C7) must be large enough so that the voltage across the capacitor is small. This means the resonance frequency formed by the flying capacitor and the inductors must be at least ten times lower than the switching frequency (see Equation 7).
Where L is the inductance of L1-A or L1-B.
To optimize efficiency, TI recommends capacitors with very low ESR such as ceramic capacitors. The voltage rating of the flying capacitor must be higher than the input voltage VBAT.
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by using Equation 8:
Parameter f is the switching frequency and ΔV is the maximum allowed ripple.
With a chosen ripple voltage of 15 mV, a minimum capacitance of 26 μF is needed. The total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 9:
An additional ripple of 24 mV is the result of using a tantalum capacitor with a low ESR of 80 mΩ. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 39 mV. Additional ripple is caused by load transients. This means that the output capacitance must be larger than calculated above to meet the total ripple requirements. The output capacitor must completely supply the load during the charging phase of the inductor. A reasonable value of the output capacitance depends on the speed of the load transients and the load current during the load change. With the calculated minimum value of 26 μF and load transient considerations, the recommended output capacitance value is in a 100-μF range. For economical reasons this usually is a tantalum capacitor. Because of this the control loop has been optimized for using output capacitors with an ESR of greater than 30 mΩ. The minimum value for the output capacitor is 22 μF.
When using output capacitors with lower ESR, like ceramics, TI recommends using the adjustable voltage version. The missing ESR can be easily compensated there in the feedback divider. Typically a capacitor in the range of 10 pF in parallel with R3 helps to obtain small signal stability, with the lowest ESR output capacitors. For more detailed analysis the small signal transfer function of the error amplifier and regulator, which is given in Equation 10, can be used.
To ensure stable output regulation, it is required to use an output capacitor at the LDO output. TI recommends using ceramic capacitors in the range from 1 μF up to 4.7 μF. At 4.7 μF and above, TI recommends using standard ESR tantalum. There is no maximum capacitance value.
The TPS6113x boost converter with LDO features two independent output voltages. An efficient synchronous boost converter provides a 3.3-V VOUT1 with output currents more than 250 mA. A >120-mA LDO regulator generates a 1.5-V VOUT2. The two outputs can be used independently from each other.
The TPS6113x boost converter with LDO features two independent output voltages. An efficient synchronous boost converter provides a 3.3-V VOUT1 and followed by a post-LDO generates a 1.5-V VOUT2.
TPS6113x could support low profile inductor with a height of 1.8 mm.
The TPS6113x could provide a linear output of 3.3 V with the input from the output of the boost converter to enable lower noise output.
The TPS6113x boost converter can support dual input power supply, one input for boost converter to generate a 3.3 Vout, while the other input for LDO to generate the second 3.3 Vout independently.