SLVS791E November 2007 – July 2016 TPS61160 , TPS61161
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation Information
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those high frequency and high current ones, layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems. To reduce switching losses, the SW pin rise and fall times are made as short as possible. To prevent radiation of high frequency resonance problems, proper layout of the high frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize inter-plane coupling. The loop including the PWM switch, Schottky diode, and output capacitor, contains high current rising and falling in nanosecond and must be kept as short as possible. The input capacitor must not only be close to the VIN pin, but also to the GND pin in order to reduce the device supply ripple. Figure 30 shows a sample layout.
10.2 Layout Example
Figure 30. TPS6116x Sample Layout
10.3 Thermal Considerations
The maximum device junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation of the TPS61160 or TPS61161. Calculate the maximum allowable dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation limit is determined using values in Equation 16:
where
- TA is the maximum ambient temperature for the application
- RθJA is the thermal resistance junction-to-ambient given in Thermal Information.
The TPS61160 and TSP61161 come in a thermally enhanced WSON package. This package includes a thermal pad that improves the thermal capabilities of the package. The RθJA of the WSON package greatly depends on the PCB layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using thermal vias underneath the thermal pad as illustrated in the layout example. Also see the QFN/SON PCB Attachment application report (SLUA271).