DC-DC STAGE |
VIN |
Input voltage |
|
2.3 |
|
6 |
V |
VFB |
Feedback voltage |
|
1.182 |
1.2 |
1.218 |
V |
|
Lline regulation |
|
|
|
0.5% |
|
|
Load regulation |
|
|
|
0.5% |
|
f |
Oscillator frequency |
|
|
3250 |
|
kHz |
rDS(on) |
High side switch on resistance |
|
|
200 |
|
mΩ |
Low side switch on resistance |
|
|
130 |
|
mΩ |
|
Reverse leakage current into VOUT |
EN = GND |
|
3.5 |
µA |
ILIM |
Programmable valley switch current limit |
ILIM pin set to VIN |
|
1500 |
|
mA |
RILIM = 20 kΩ (500mA) |
-20% |
|
+20% |
|
IQ |
Quiescent current |
IOUT = 0 mA, device not switching |
|
30 |
|
µA |
ISD |
Shutdown current |
|
|
0.85 |
3.5 |
μA |
OVP |
Input over voltage protection threshold |
Falling |
|
6.4 |
|
V |
Rising |
|
6.5 |
|
V |
CONTROL STAGE |
VUVLO |
Under voltage lockout threshold |
Falling |
|
2.0 |
2.1 |
V |
Hysteresis |
|
0.1 |
|
V |
VIL |
EN input low voltage |
2.3 V ≤ VIN ≤ 6.0 V |
|
0.4 |
V |
VIH |
EN input high voltage |
2.3 V ≤ VIN ≤ 6.0 V |
1.0 |
|
V |
|
EN, PG input leakage current |
Clamped to GND or VIN |
|
0.5 |
µA |
|
Power Good threshold voltage |
Rising (% VOUT) |
92.5% |
95% |
97.5% |
|
Falling (% VOUT) |
87.5% |
90% |
92.5% |
|
|
Power good delay |
|
|
10 |
|
µs |
|
Overtemperature protection |
Rising |
|
140 |
|
°C |
|
Overtemperature hysteresis |
|
|
20 |
|
°C |