ZHCSGX8E march 2017 – june 2023 TPS61253A , TPS61253E
PRODUCTION DATA
The TPS61253x synchronous step-up converter typically operates at a quasi-constant 3.8-MHz frequency pulse width modulation (PWM) from the moderate-to-heavy load currents. During the PWM operation, the converter uses a quasi-constant on-time valley current mode control scheme to achieve the excellent line / load regulation and allows the use of a small inductor and ceramic capacitors. Based on the VIN / VOUT ratio, a simple circuit predicts the required on-time. At the beginning of the switching cycle, the low-side N-MOS switch is turned on and the inductor current ramps up to a peak current that is defined by the on-time and the inductance. In the second phase, once the on-timer has expired, the rectifier FET is turned on and the inductor current decays to a preset valley current threshold. Then, the switching cycle repeats by setting the on timer again and activating the low-side N-MOS switch.
At the light load current conditions, the TPS61253x can be flexibly configured at the Auto PFM mode, the forced PWM or the ultrasonic mode. At the Auto PFM mode, the TPS61253x converter operates in Power Save Mode with pulse frequency modulation (PFM) and improves the efficiency. For forced PWM mode, the switching frequency is the same at the light load as that of heavy load. The ultrasonic mode is a unique control feature that keeps the switching frequency above 25 kHz to avoid the acoustic audible frequencies toward virtually no load condition.
In general, a dc/dc step-up converter can only operate in "true" boost mode, that is the output “boosted” by a certain amount above the input voltage. The TPS61253x device operates differently as it can smoothly transition in and out of pass-through operation (VIN exceeds the preset out of Boost). Therefore the output can be kept as close as possible to its regulation limits even though the converter is subject to an input voltage that tends to be excessive.
Internal soft start and loop compensation simplify the design process while minimizing the number of external components.