ZHCSLR2C August   2020  – March 2022 TPS61288

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable and Start-up
      2. 8.3.2 Undervoltage Lockout (UVLO)
      3. 8.3.3 Switching Peak Current Limit
      4. 8.3.4 Overvoltage Protection
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 PWM
      2. 8.4.2 PFM
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting Output Voltage
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 支持资源
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5 Electrical Characteristics

TJ = –40°C to 125°C, VIN = 2.5 V to 9 V and VOUT = 16 V. Typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
VUVLO Input voltage under voltage lockout (UVLO) threshold VIN rising 2.3 2.4 V
Input voltage under voltage lockout (UVLO) threshold VIN falling, VOUT > 3 V 1.8 1.9 2 V
under voltage lock out hysteresis VUVLO rising - VUVLO falling 400 mV
VCC Vcc regulated votlage ICC = 5 mA, VIN = 9 V 4.8 V
VCC_UVLO Vcc falling threshold VCC falling 1.9 2 V
IQ_IN Quiescent current into VIN pin EN = High, No switching, 2.4 V < VIN  < 16 V, VOUT > 1.1 VIN, -40°C ≤ TJ ≤ 85 °C 3 10 uA
IQ_OUT Quiescent current into VOUT pin EN = High, No switching, 2.4 V < VIN < 16 V, VOUT > 1.1 VIN, -40 °C ≤ TJ ≤ 85 °C 110 165 uA
ISD Shutdown current into VIN pin EN = Low, No switching, 2.4 V < VIN  < 18 V, -40 °C ≤ TJ ≤ 85 °C 2.1 uA
ISD_SW Reverse leakage current into SW EN = Low, No switching, VSW = 0V, 4.5 V < VOUT  < 18 V, -40 °C ≤ TJ ≤  85°C 1 uA
OUTPUT
VREF Feedback regulation reference voltage PWM Operation 0.588 0.6 0.612 V
IFB Feedback input bias current 20 nA
VOVP Over Voltage Protection Rising threshold 18.3 19 19.5 V
VOVP_HYS Over Voltage Protection Hysteresis 600 mV
POWER SWITCH
RDS(on) High-side FET on resistance VCC = 5 V 8.5 mΩ
RDS(on) Low-side FET on resistance VCC = 5 V 6.5 mΩ
CURRENT LIMIT
ILIM Switching Peak Current Limit VIN = 7.2 V, VOUT = 16 V, L = 2.2 uH, -20 °C ≤ TJ ≤ 125 °C 12 15 17.1 A
LOGIC INTERFACE
VIH EN High-level input voltage 1.2 V
VIL EN Low-level input voltage 0.4 V
VHYS Hysteresis of the control logic 50 mV
REN Pull down resistor for control pin 850 1100 kΩ
ERROR AMPLIFIER
VCOMP_H COMP output high voltage VFB = VREF - 200 mV 1.88 V
VCOMP_L COMP output low voltage VFB = VREF + 200 mV 0.55 V
Gm Error amplifier trans conductance 180 µS
KCOMP Power stage trans-conductance(inductor peak current / comp voltage)   13.5   A / V
ISINK Comp pin sink current VFB = VREF + 200 mV, VCOMP = 1.5 V 20 µA
ISOURCE Comp pin source current VFB = VREF + 200 mV, VCOMP = 1.5 V 20 µA
SWITCHING TIME
TSS Soft start time VIN = 7.2V, VOUT = 16V; L = 2.2 uH, Cout(eff) = 50 uF 3 ms
fSW Switching frequency VIN = 7.2V, VOUT = 16V; VIN = 3.6V, VOUT = 13V 440 500 600 kHz
tON_MIN Minimum on-time 60 110 ns
PROTECTION
TSD Thermal shutdown Junction temperature rising 160 °C
TSD_HYS Thermal shutdown hysteresis 20 °C
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