The output capacitor is mainly selected to meet the requirements at load transient or steady state. Then the loop is compensated for the output capacitor selected. The output ripple voltage is related to the equivalent series resistance (ESR) of the capacitor and its capacitance. Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by Equation 10:

Equation 10.

where

• C_OUT is the output capacitor
• I_OUT is the output current
• V_OUT is the output voltage
• V_IN is the input voltage
• Δ_V is the output voltage ripple required
• ƒ_SW is the switching frequency

The additional output ripple component caused by ESR is calculated by Equation 11:

Equation 11.

where

• ΔV_ESR is the output voltage ripple caused by ESR
• R_ESR is the resistor in series with the output capacitor

For the ceramic capacitor, the ESR ripple can be neglected. However, for tantalum or electrolytic capacitors, it must be considered if used.

The minimum ceramic output capacitance needed to meet a load transient requirement can be estimated using Equation 12:

Equation 12.

where

• ΔI_STEP is the transient load current step
• ΔV_TRAN is the allowed voltage dip for the load current step
• ƒ_BW is the control loop bandwidth (that is, the frequency where the control loop gain crosses zero)

For the output capacitor on the OUT pin, the effective capacitance is recommended between 0.22 μF to 1 μF.

Care must be taken when evaluating the derating of a ceramic capacitor under the DC bias. Ceramic capacitors can derate by as much as 70% of its capacitance at its rated voltage. Therefore, enough margins on the voltage rating must be considered to ensure adequate capacitance at the required output voltage.