ZHCSD80B january   2015  – august 2023 TPS62065-Q1 , TPS62067-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6.     Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Mode Selection (TPS62065-Q1) and Forced PWM Mode (TPS62067A-Q1)
      2. 9.3.2 Power Good (PG, TPS62067x-Q1)
      3. 9.3.3 Enable
      4. 9.3.4 Shutdown and Output Discharge
      5. 9.3.5 Soft Start
      6. 9.3.6 Undervoltage Lockout (UVLO)
      7. 9.3.7 Internal Current Limit and Foldback Current Limit For Short-Circuit Protection
      8. 9.3.8 Clock Dithering
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Save Mode
        1. 9.4.1.1 Dynamic Voltage Positioning
        2. 9.4.1.2 100% Duty-Cycle Low-Dropout Operation
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Output Voltage Setting
        2. 10.2.2.2 Output Filter Design (Inductor And Output Capacitor)
          1. 10.2.2.2.1 Inductor Selection
          2. 10.2.2.2.2 Output Capacitor Selection
          3. 10.2.2.2.3 Input Capacitor Selection
        3. 10.2.2.3 Checking Loop Stability
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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9.3.4 Shutdown and Output Discharge

When EN is pulled low, the device enters shutdown mode. In this mode, all circuits are disabled and the SW pin is connected to PGND through an internal resistor to discharge the output. This feature ensures a start-up in a discharged output capacitor after the converter is enabled again and prevents a floating charge on the output capacitor. The input voltage must remain higher than 1 V (TYP) to keep the output discharge function.
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