ZHCSMN1A December 2015 – January 2021 TPS62097
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY | ||||||
IQ | Quiescent current into AVIN, PVIN | EN = High, Device not switching, TJ = –40°C to 85°C | 40 | 57 | µA | |
EN = High, Device not switching | 40 | 65 | ||||
ISD | Shutdown current into AVIN, PVIN | EN = Low, TJ = –40°C to 85°C | 0.7 | 3 | µA | |
EN = Low | 0.7 | 10 | ||||
VUVLO | Under voltage lock out threshold | VIN falling | 2.2 | 2.3 | 2.4 | V |
VIN rising | 2.3 | 2.4 | 2.5 | |||
TJSD | Thermal shutdown threshold | TJ rising | 160 | °C | ||
Thermal shutdown hysteresis | TJ falling | 20 | °C | |||
LOGIC INTERFACE (EN, MODE) | ||||||
VH_EN | High-level input voltage, EN pin | 2.0 | 1.6 | V | ||
VL_EN | Low-level input voltage, EN pin | 1.3 | 1.0 | V | ||
IEN,LKG | Input leakage current into EN pin | EN = High | 0.01 | 0.9 | µA | |
RPD | Pull-down resistance at EN pin | EN = Low | 375 | kΩ | ||
VH_MO | High-level input voltage, MODE pin | 1.2 | V | |||
VL_MO | Low-level input voltage, MODE pin | 0.4 | V | |||
IMO,LKG | Input leakage current into MODE pin | MODE = High | 0.01 | 0.16 | µA | |
SOFT STARTUP, POWER GOOD (SS/TR, PG) | ||||||
ISS | Soft startup current | 5.5 | 7.5 | 9.5 | µA | |
Voltage tracking gain factor | VFB / VSS/TR | 1 | ||||
VPG | Power good threshold | VOUT rising, referenced to VOUT nominal | 92 | 95 | 98 | % |
VOUT falling, referenced to VOUT nominal | 87 | 90 | 92 | |||
VPG,OL | Low-level output voltage, PG pin | Isink = 1mA | 0.4 | V | ||
IPG,LKG | Input leakage current into PG pin | VPG = 5.0V | 0.01 | 1.6 | µA | |
OUTPUT | ||||||
VOUT | Output voltage accuracy TPS6209718, TPS6209733 |
PWM mode, No load | –1.0 | 1.0 | % | |
PSM mode(1) | –1.0 | 2.1 | ||||
VFB | Feedback reference voltage | PWM mode | 792 | 800 | 808 | mV |
PSM mode(1) | 792 | 800 | 817 | |||
IFB,LKG | Input leakage current into FB pin | VFB = 0.8V | 0.01 | 0.1 | µA | |
RDIS | Output discharge resistor | EN = Low, VOUT = 1.8V | 165 | Ω | ||
Line regulation | IOUT = 0.5A, VOUT = 1.8V(1) | 0.02 | %/V | |||
Load regulation | PWM mode, VOUT = 1.8V (1) | 0.2 | %/A | |||
POWER SWITCH | ||||||
RDS(on) | High-side FET on-resistance | ISW = 500mA, VIN = 5.0V | 40 | 73 | mΩ | |
ISW = 500mA, VIN = 3.6V | 50 | 96 | ||||
Low-side FET on-resistance | ISW = 500mA, VIN = 5.0V | 40 | 68 | mΩ | ||
ISW = 500mA, VIN = 3.6V | 50 | 85 | ||||
ILIMF | High-side FET forward current limit | 3.1 | 3.6 | 4.2 | A | |
VIN = 5.0V | 3.3 | 3.6 | 3.9 | |||
ILIMN | Low-side FET negative current limit | Forced PWM mode | –1.25 | –1.1 | -0.7 | A |