The device offers a low input to output voltage dropout by entering 100% duty cycle mode when the input voltage reaches the level of the output voltage. In this mode, the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. The minimum input voltage to maintain output regulation, depending on the load current and output voltage, is calculated as:

where

• V_IN(min) = Minimum input voltage to maintain a minimum output voltage
• I_OUT = Output current
• R_DS(on) = High side FET on-resistance
• R_L = Inductor ohmic resistance (DCR)

When the device operates close to 100% duty cycle mode, the TPS62097 cannot enter Power Save Mode regardless of the load current if the input voltage decreases to typically 15% above the output voltage. The device maintains output regulation in PWM mode.