具有 DCS-Control™ 的 TPS6216x 3V 至 17V 1A 降压转换器

器件信息⁽¹⁾

Pin Functions

7.1 Absolute Maximum Ratings⁽¹⁾

7.2 ESD Ratings

7.3 Recommended Operating Conditions

7.4 Thermal Information

7.5 Electrical Characteristics

7.6 Typical Characteristics

Figure 1. Quiescent Current

Figure 3. High-Side Switch

Figure 2. Shutdown Current

Figure 4. Low-Side Switch

8.1 Overview

The TPS6216x synchronous step-down DC/DC converters are based on DCS-Control™ (Direct Control with Seamless transition into power save mode), an advanced regulation topology, that combines the advantages of hysteretic, voltage mode and current mode control including an AC loop directly associated to the output voltage. This control loop takes information about output voltage changes and feeds it directly to a fast comparator stage. It sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. To get accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation network achieves fast and stable operation with small external components and low ESR capacitors.

The DCS-Control^TM topology supports pulse width modulation (PWM) mode for medium and heavy load conditions and a power save mode at light loads. During PWM mode, it operates at its nominal switching frequency in continuous conduction mode. This frequency is typically about 2.25 MHz with a controlled frequency variation depending on the input voltage. If the load current decreases, the converter enters power save mode to sustain high efficiency down to very light loads. In power save mode, the switching frequency decreases linearly with the load current. Since DCS-Control^TM supports both operation modes within one single building block, the transition from PWM to power save mode is seamless without effects on the output voltage.

Fixed output voltage versions provide smallest solution size and lowest current consumption, requiring only 3 external components. An internal current limit supports nominal output currents of up to 1 A.

The TPS6216x family offers both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.

8.2 Functional Block Diagrams

Figure 5. TPS62160 (Adjustable Output Voltage)

Figure 6. TPS62161/TPS62162/TPS62163 (Fixed Output Voltage)

8.3 Feature Description

8.3.2 Current Limit and Short Circuit Protection

The TPS6216x devices are protected against heavy load and short circuit events. At heavy loads, the current limit determines the maximum output current. If the current limit is reached, the high-side FET is turned off. Avoiding shoot through current, the low-side FET is switched on to allow the inductor current to decrease. The high-side FET turns on again, only if the current in the low-side FET decreases below the low-side current limit threshold of typically 1.2 A.

The output current of the device is limited by the current limit (see Electrical Characteristics). Due to internal propagation delay, the actual current can exceed the static current limit during that time. The dynamic current limit is calculated as follows:

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Equation 1.

where

• I_LIMF is the static current limit, specified in Electrical Characteristics
• L is the inductor value
• V_L is the voltage across the inductor
• t_PD is the internal propagation delay

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The dynamic high-side switch peak current is calculated as follows:

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Equation 2.

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Take care with the current limit, if the input voltage is high and very small inductances are used.

8.4 Device Functional Modes

8.4.3 Power Save Mode Operation

The TPS6216x's built in power save mode is entered seamlessly, if the load current decreases. This secures a high efficiency in light load operation. The device remains in power save mode as long as the inductor current is discontinuous.

In power save mode the switching frequency decreases linearly with the load current maintaining high efficiency. The transition into and out of power save mode happens within the entire regulation scheme and is seamless in both directions.

The TPS6216x includes a fixed on-time circuitry. This on-time, in steady-state operation, is estimated as:

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Equation 3.

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For very small output voltages, the on-time increases beyond the result of Equation 3, to stay above an absolute minimum on-time, t_ON(min), which is around 80 ns, to limit switching losses. The peak inductor current in PSM is approximated by:

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Equation 4.

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When V_IN decreases to typically 15% above V_OUT, the TPS6216x does not enter power save mode, regardless of the load current. The device maintains output regulation in PWM mode.

8.4.4 100% Duty-Cycle Operation

The duty cycle of the buck converter is given by D = V_OUT/V_IN and increases as the input voltage comes close to the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch 100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal setpoint. This allows the conversion of small input to output voltage differences, such as for longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.

The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, is calculated as:

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Equation 5.

where

• I_OUT is the output current
• R_DS(on) is the R_DS(on) of the high-side FET
• R_L is the DC resistance of the inductor used

9.1 Application Information

The TPS6216x device family are easy to use synchronous step-down DC/DC converters optimized for applications with high power density. A high switching frequency of typically 2.25 MHz allows the use of small inductors and provides fast transient response as well as high output voltage accuracy by utilization of the DCS-Control™ topology. With its wide operating input voltage range of 3 V to 17 V, the devices are ideally suited for systems powered from either a Li-Ion or other battery as well as from 12-V intermediate power rails. It supports up to 1-A continuous output current at output voltages between 0.9 V and 6 V (with 100% duty cycle mode).

9.2 Typical Application

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Figure 7. TPS62160 Adjustable Power Supply

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9.2.2 Detailed Design Procedure

9.2.2.1 Custom Design with WEBENCH® Tools

Click here to create a custom design using the TPS62160 device with the WEBENCH® Power Designer.

1. Start by entering your V_IN, V_OUT, and I_OUT requirements.
2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and compare this design with other possible solutions from Texas Instruments.
3. The WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real time pricing and component availability.
4. In most cases, you will also be able to:
   • Run electrical simulations to see important waveforms and circuit performance
   • Run thermal simulations to understand the thermal performance of your board
   • Export your customized schematic and layout into popular CAD formats
   • Print PDF reports for the design, and share your design with colleagues
5. Get more information about WEBENCH tools at www.ti.com/WEBENCH.

9.2.2.2 Programming the Output Voltage

While the output voltage of the TPS62160 is adjustable, the TPS62161/TPS62162/TPS62163 are programmed to fixed output voltages. For fixed output versions, the FB pin is pulled down internally and may be left floating. It is recommended to connect it to AGND to improve thermal resistance. The adjustable version can be programmed for output voltages from 0.9 V to 6 V by using a resistive divider from VOUT to AGND. The voltage at the FB pin is regulated to 800 mV. The value of the output voltage is set by the selection of the resistive divider from Equation 6. It is recommended to choose resistor values which allow a current of at least 2 µA, meaning the value of R2 should not exceed 400 kΩ. Lower resistor values are recommended for highest accuracy and most robust design. For applications requiring lowest current consumption, the use of fixed output voltage versions is recommended.

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Equation 6.

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If the FB pin becomes open, the device clamps the output voltage at the VOS pin to about 7.4 V.

9.2.2.3 External Component Selection

The external components have to fulfill the needs of the application, but also the stability criteria of the devices control loop. The TPS6216x is optimized to work within a range of external components. The LC output filter's inductance and capacitance have to be considered together, creating a double pole, responsible for the corner frequency of the converter (see Output Filter and Loop Stability section). Table 2 can be used to simplify the output filter component selection. Checked cells represent combinations that are proven for stability by simulation and lab test. Further combinations should be checked for each individual application.

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Table 2. Recommended LC Output Filter Combinations⁽¹⁾

	4.7µF	10µF	22µF	47µF	100µF	200µF	400µF
1µH
2.2µH		√	√(2)	√	√	√
3.3µH		√	√	√	√
4.7µH

(1) The values in the table are nominal values. Variations of typically ±20% due to tolerance, saturation and DC bias are assumed.

(2) This LC combination is the standard value and recommended for most applications.

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More detailed information on further LC combinations can be found in SLVA463.

9.2.2.4 Inductor Selection

The inductor selection is affected by several effects like inductor ripple current, output ripple voltage, PWM-to-PSM transition point and efficiency. In addition, the inductor selected has to be rated for appropriate saturation current and DC resistance (DCR). Equation 7 and Equation 8 calculate the maximum inductor current under static load conditions.

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Equation 7.

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Equation 8.

where

• I_L(max) is the maximum inductor current
• ΔI_L is the peak-to-peak inductor ripple current
• L(min) is the minimum effective inductor value
• f_SW is the actual PWM switching frequency

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Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation current of the inductor needed. A margin of about 20% is recommended to add. A larger inductor value is also useful to get lower ripple current, but increases the transient response time and size as well. The following inductors have been used with the TPS6216x and are recommended for use:

Table 3. List of Inductors⁽¹⁾

Type	Inductance [µH]	Current [A](2)	Dimensions [L x B x H] mm	Manufacturer
VLF3012ST-2R2M1R4	2.2 µH, ±20%	1.9 A	3.0 x 2.8 x 1.2	TDK
VLF302512MT-2R2M	2.2 µH, ±20%	1.9 A	3.0 x 2.5 x 1.2	TDK
VLS252012T-2R2M1R3	2.2 uH, ±20%	1.3 A	2.5 x 2.0 x 1.2	TDK
XFL3012-222MEC	2.2 µH, ±20%	1.9 A	3.0 x 3.0 x 1.2	Coilcraft
XFL3012-332MEC	3.3 µH, ±20%	1.6 A	3.0 x 3.0 x 1.2	Coilcraft
LPS3015-332ML_	3.3 uH, ±20%	1.4 A	3.0 x 3.0 x 1.4	Coilcraft
NR3015T-2R2M	2.2 uH, ±20%	1.5 A	3.0 x 3.0 x 1.5	Taiyo Yuden
744025003	3.3 uH, ±20%	1.5 A	2.8 x 2.8 x 2.8	Wuerth
PSI25201B-2R2MS	2.2 uH, ±20%	1.3 A	2.0 x 2.5 x 1.2	Cyntec

(1) See the Third-Party Products Disclaimer.

(2) I_RMS at 40°C rise or I_SAT at 30% drop.

The TPS6216x can operate with an inductor as low as 2.2 µH. However, for applications with low input voltages, 3.3 µH is recommended to allow the full output current. The inductor value also determines the load current at which Power Save Mode is entered:

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Equation 9.

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Using Equation 8, this current level is adjusted by changing the inductor value.

9.2.2.5 Capacitor Selection

9.2.2.5.1 Output Capacitor

The recommended value for the output capacitor is 22 uF. The architecture of the TPS6216x allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, it is recommended to use an X7R or X5R dielectric. Using a higher value can have some advantages like smaller voltage ripple and a tighter DC output accuracy in power save mode (see SLVA463).

Note: In power save mode, the output voltage ripple depends on the output capacitance, its ESR and the peak inductor current. Using ceramic capacitors provides small ESR and low ripple.

9.2.2.5.2 Input Capacitor

For most applications, 10 µF is sufficient and is recommended, though a larger value reduces input current ripple further. The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. A low ESR multilayer ceramic capacitor is recommended for best filtering and should be placed between VIN and PGND as close as possible to those pins.

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NOTE

DC bias effect: High capacitance ceramic capacitors have a DC bias effect, which has a strong influence on the final effective capacitance. Therefore the right capacitor value has to be chosen carefully. Package size and voltage rating in combination with dielectric material are responsible for differences between the rated capacitor value and the effective capacitance.

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9.2.2.6 Output Filter and Loop Stability

The devices of the TPS6216x family are internally compensated to be stable with L-C filter combinations corresponding to a corner frequency calculated with Equation 10:

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Equation 10.

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Proven nominal values for inductance and ceramic capacitance are given in Table 2 and are recommended for use. Different values may work, but care has to be taken on the loop stability which is affected. More information including a detailed L-C stability matrix is found in SLVA463.

The TPS6216X devices, both fixed and adjustable versions, include an internal 25 pF feed forward capacitor, connected between the VOS and FB pins. This capacitor impacts the frequency behavior and sets a pole and zero in the control loop with the resistors of the feedback divider, per Equation 11 and Equation 12:

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Equation 11.

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Equation 12.

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Though the TPS6216x devices are stable without the pole and zero being in a particular location, adjusting their location to the specific needs of the application can provide better performance in power save mode and/or improved transient response. An external feed-forward capacitor can also be added. A more detailed discussion on the optimization for stability versus transient response can be found in SLVA289 and SLVA466.

If using ceramic capacitors, the DC bias effect has to be considered. The DC bias effect results in a drop in effective capacitance as the voltage across the capacitor increases (see NOTE in Input Capacitor section).

9.2.2.7 TPS6216x Components List

Table 4 shows the list of components for the Application Curves.

Table 4. List of Components

REFERENCE	DESCRIPTION	MANUFACTURER
IC	17 V, 1 A Step-Down Converter, WSON	TPS62160DSG, Texas Instruments
L1	2.2 µH, 1.4 A, 3 mm x 2.8 mm x 1.2 mm	VLF3012ST-2R2M1R4, TDK
C1	10 µF, 25 V, Ceramic, 0805	Standard
C2	22 µF, 6.3 V, Ceramic, 0805	Standard
R1	depending on VOUT
R2	depending on VOUT
R3	100 kΩ, Chip, 0603, 1/16 W, 1%	Standard

9.2.3 Application Curves

V_IN=12 V, V_OUT=3.3 V, T_A=25°C, (unless otherwise noted)

VOUT = 6 V

Figure 8. Efficiency vs Output Current

VOUT = 5 V

Figure 10. Efficiency vs Output Current

VOUT = 3.3 V

Figure 12. Efficiency vs Output Current

VOUT = 1.8 V

Figure 14. Efficiency vs Output Current

VOUT = 0.9 V

Figure 16. Efficiency vs Output Current

Figure 18. Output Voltage Accuracy (Load Regulation)

VIN = 12 V

Figure 20. Switching Frequency

Figure 22. Output Voltage Ripple

Figure 24. PWM to PSM Mode Transition

Figure 26. Load Transient Response in PWM Mode
(500 mA to 1 A)

Figure 28. Load Transient Response in PWM Mode
(500 mA to 1 A), Rising Edge

Figure 30. Startup with I_OUT = 100 mA

IOUT = 66 mA

Figure 32. Typical Operation in Power Save Mode

VOUT = 6 V

Figure 9. Efficiency vs Input Voltage

VOUT = 5 V

Figure 11. Efficiency vs Input Voltage

VOUT = 3.3 V

Figure 13. Efficiency vs Input Voltage

VOUT = 1.8 V

Figure 15. Efficiency vs Input Voltage

VOUT = 0.9 V

Figure 17. Efficiency vs Input Voltage

Figure 19. Output Voltage Accuracy (Line Regulation)

VOUT = 3.3 V

Figure 21. Switching Frequency

Figure 23. Maximum Output Current

Figure 25. PSM to PWM Mode Transition

Figure 27. Load Transient Response from Power Save Mode (100 mA to 500 mA)

Figure 29. Load Transient Response in PWM Mode
(500 mA to 1 A), Falling Edge

Figure 31. Startup with I_OUT = 1 A

IOUT = 1 A

Figure 33. Typical Operation in PWM Mode

9.3 System Examples

9.3.1 1-A Power Supply

The following example circuits show various TPS6216x devices and input voltages that provide a 1-A power supply with output voltage options.

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Figure 34. 5 V / 1 A Power Supply

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Figure 35. 3.3 V / 1 A Power Supply

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Figure 36. 2.5 V / 1 A Power Supply

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Figure 37. 1.8 V / 1 A Power Supply

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Figure 38. 1.5 V / 1 A Power Supply

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Figure 39. 1.2 V / 1 A Power Supply

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Figure 40. 1 V / 1 A Power Supply

9.3.2 Inverting Power Supply

The TPS6216x can be used as inverting power supply by rearranging external circuitry as shown in Figure 41. As the former GND node now represents a voltage level below system ground, the voltage difference between V_IN and V_OUT has to be limited for operation to the maximum supply voltage of 17 V (see Equation 13).

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Equation 13.

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Figure 41. –5 V Inverting Power Supply

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The transfer function of the inverting power supply configuration differs from the buck mode transfer function, incorporating a right half plane zero additionally. The loop stability has to be adapted and an output capacitance of at least 22 µF is recommended. A detailed design example is given in SLVA469.

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The TPS6216x device family has no special requirements for its input power supply. The input power supply' s output current needs to be rated according to the supply voltage, output voltage, and output current of the TPS6216x.

11.1 Layout Guidelines

A proper layout is critical for the operation of a switched mode power supply, even more at high switching frequencies. Therefore the PCB layout of the TPS6216x demands careful attention to ensure operation and to get the performance specified. A poor layout can lead to issues like poor regulation (both line and load), stability and accuracy weaknesses, increased EMI radiation, and noise sensitivity.

Provide low inductive and resistive paths to ground for loops with high di/dt. Therefore paths conducting the switched load current should be as short and wide as possible. Provide low capacitive paths, with respect to all other nodes, for wires with high dv/dt. Therefore the input and output capacitance should be placed as close as possible to the IC pins and parallel wiring over long distances as well as narrow traces should be avoided. Loops which conduct an alternating current should outline an area as small as possible, as this area is proportional to the energy radiated.

Also sensitive nodes like FB and VOS should be connected with short wires, not nearby high dv/dt signals, such as SW. As they carry information about the output voltage, they should be connected as close as possible to the actual output voltage (at the output capacitor). Signals not assigned to power transmission, such as the feedback divider, should refer to the signal ground (AGND) and always be separated from the power ground (PGND).

In summary, the input capacitor should be placed as close as possible to the VIN and PGND pin of the IC. This connections should be done with wide and short traces. The output capacitor should be placed such that its ground is as close as possible to the IC's PGND pins - avoiding additional voltage drop in traces. This connection should also be made short and wide. The inductor should be placed close to the SW pin and connect directly to the output capacitor - minimizing the loop area between the SW pin, inductor, output capacitor and PGND pin. The feedback resistors, R₁ and R₂, should be placed close to the IC and connect directly to the AGND and FB pins. Those connections (including VOUT) to the resistors and especially to the VOS pin should stay away from noise sources, such as the inductor. The VOS pin should connect in the shortest way to VOUT at the output capacitor, while the VOUT connection to the feedback divider can connect at the load.

A single point grounding scheme should be implemented with all grounds (AGND, PGND and the thermal pad) connecting at the IC's exposed thermal pad. See Figure 42 for the recommended layout of the TPS6216x. More detailed information can be found in the EVM Users Guide, SLVU483.

The exposed thermal pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation. Although the exposed thermal pad can be connected to a floating circuit board trace, the device has better thermal performance if it is connected to a larger ground plane. The exposed thermal pad is electrically connected to AGND.

11.2 Layout Example

Figure 42. TPS6216x Board Layout

11.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.

Three basic approaches for enhancing thermal performance are listed below:

• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB by soldering the exposed thermal pad
• Introducing airflow in the system

For more details on how to use the thermal parameters, see the application reports Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs, SZZA017 and Semiconductor and IC Package Thermal Metrics, SPRA953.

The TPS6216x is designed for a maximum operating junction temperature (T_J) of 125°C. Therefore the maximum output power is limited by the power losses that can be dissipated over the actual thermal resistance, given by the package and the surrounding PCB structures. If the thermal resistance of the package is given, the size of the surrounding copper area and a proper thermal connection of the IC can reduce the thermal resistance. To get an improved thermal behavior, TI recommends to use top layer metal to connect the device with wide and thick metal lines. Internal ground layers can connect to vias directly under the IC for improved thermal performance.

If short circuit or overload conditions are present, the device is protected by limiting internal power dissipation.

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12.5 商标

DCS-Control, E2E are trademarks of Texas Instruments.

WEBENCH is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.7 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.