SLVSAO5B December   2010  – October 2015 TPS62590-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable
      2. 8.3.2 Mode Selection
      3. 8.3.3 Soft Start
      4. 8.3.4 Short-Circuit Protection
      5. 8.3.5 100% Duty-Cycle Low-Dropout Mode
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode
      2. 8.4.2 Dynamic Voltage Positioning
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting
        2. 9.2.2.2 External Feed-Forward Capacitor
        3. 9.2.2.3 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.3.1 Inductor Selection
          2. 9.2.2.3.2 Output Capacitor Selection
          3. 9.2.2.3.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues, and EMI problems.

The following list details some generic layout guidelines for the TPS62590-Q1 device:

  • It is critical to provide a low-inductance, low-impedance ground path and hence use wide and short traces for the main current paths.
  • The input capacitor, output capacitor, and inductor should be placed as close as possible to the IC pins.
  • Connect the GND pin of the device to the thermal pad of the PCB and use this pad as a star point.
  • Use a common power GND node and a different node for the signal GND to minimize the effects of ground noise. Connect these ground nodes together at the thermal pad (star point) underneath the IC.
  • Keep the traces to the GND pin, coming from small-signal components and the high current of the output capacitors, as short as possible to avoid ground noise.
  • The output feedback line should be connected close to the output capacitor and routed away from noisy components and traces (for example, the SW line).
  • Trace to the FB pin from voltage divider resistors center point should be as short as possible and should be away from noise sources, such as the inductor or the SW line.
  • Add multiple thermal via's on the device thermal pad for better thermal performance.

11.2 Layout Example

TPS62590-Q1 Layout_Diagram_Final_Updated_TPS62590_Q1.png Figure 29. Layout