In devices with hiccup protection, when a current limit event occurs for 32 consecutive switching cycles (about 16 µs), the device turns off the high-side FET for about 9.6 ms, during which time the inductor current decays through the low-side FET body diode. After 9.6 ms has expired, the device automatically starts switching again, beginning with a soft-start condition. The device alternates between bursts of switching cycles and 9.6-ms pauses for as long as the overload condition on the output exists.

In devices with latch-off protection, When a current limit event occurs for 32 consecutive switching cycles (about 16 µs), the device stops switching and latches off the high-side and low-side FETs. To recover normal operation after a latched short-circuit event, you must cycle V_IN or EN.

In devices with latch-off protection, there is also an OVP protection circuit that uses the PG window comparator. An OVP event is detected when the FB voltage is approximately 110% × (0.5V) for a period longer than the deglitch time of 35 µs. In this case, the converter de-asserts the PG signal and performs the overvoltage protection function. The converter latches off both high-side and low-side FET and remains in this state. To recover normal operation after a latched short-circuit event, you must cycle V_IN or EN.