ZHCSL99G September 2019 – January 2025 TPS62860 , TPS62861
PRODUCTION DATA
I2C™ is a 2-wire serial interface developed by Philips Semiconductor, now NXP Semiconductors (see I2C-Bus Specification, Version .6, 2014). The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high. All the I2C-compatible devices connect to the I2C bus through open-drain I/O pins, SDA and SCL. A controller device, usually a microcontroller or a digital signal processor, controls the bus. The controller is responsible for generating the SCL signal and device addresses. The controller also generates specific conditions that indicate the START and STOP of data transfer. A target device receives, transmits data, or both on the bus under control of the controller device.
The TPS6286x device works as a target and supports the following data transfer modes, as defined in the I2C-Bus Specification: standard mode (100 kbps), fast mode (400 kbps), and fast mode plus (1 Mbps). The interface adds flexibility to the power supply solution, enabling most functions to be programmed to new values depending on the instantaneous application requirements. Register contents remain intact as long as the input voltage remains above 1.8 V.
The data transfer protocol for standard and fast modes is exactly the same, therefore, the modes are referred to as F/S-mode in this document. The protocol for high-speed mode is different and must not be used.
TI recommends that the I2C controller initiates a STOP condition on the I2C bus after the initial power up of SDA and SCL pullup voltages to make sure of reset of the I2C engine.