ZHCSNO7 March 2021 TPS62865 , TPS62867
PRODUCTION DATA
During the enable delay (tDelay), the device configuration is set by an external resistor connected to the VSET/MODE pin through an internal R2D (resistor to digital) converter. Table 8-2 shows the options.
The R2D converter has an internal current source that applies current through the external resistor and an internal ADC that reads back the resulting voltage level. Depending on the level, the output voltage is set. Once this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Ensure that there is no additional current path or capacitance greater than 30 pF from this pin to GND during R2D conversion. Otherwise, a false value is set.
| RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/MODE PIN | FIXED OR ADJUSTABLE OUTPUT VOLTAGE |
|---|---|
| 249 kΩ or logic high | adjustable |
| 205 kΩ | 3.30 V |
| 162 kΩ | 2.50 V |
| 133 kΩ | 1.80 V |
| 105 kΩ | 1.50 V |
| 86.6 kΩ | reserved |
| 68.1 kΩ | 1.35 V |
| 56.2 kΩ | 1.20 V |
| 44.2 kΩ | 1.10 V |
| 36.5 kΩ | 1.05 V |
| 28.7 kΩ | 1.00 V |
| 23.7 kΩ | 0.95 V |
| 18.7 kΩ | 0.90 V |
| 15.4 kΩ | 0.85 V |
| 12.1 kΩ | 0.80 V |
| 10 kΩ or logic low | adjustable |
When the device is set as a fixed output voltage converter, then FB pin must be connected to the output directly. Refer to Figure 8-2.
After the start-up period (tStartup), a different operation mode can be selected. When VSET/MODE is high, the device operates in forced PWM mode, otherwise the device operates in power save mode.