ZHCSNZ3B January 2023 – May 2024 TPS62870 , TPS62871 , TPS62872 , TPS62873
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 说明（续）
- 5 Device Options
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Fixed-Frequency DCS Control Topology
- 8.3.2 Forced PWM and Power Save Modes
- 8.3.3 Precise Enable
- 8.3.4 Start-Up
- 8.3.5 Switching Frequency Selection
- 8.3.6 Output Voltage Setting
- 8.3.7 Compensation (COMP)
- 8.3.8 Mode Selection and Clock Synchronization (MODE/SYNC)
- 8.3.9 Spread Spectrum Clocking (SSC)
- 8.3.10 Output Discharge
- 8.3.11 Undervoltage Lockout (UVLO)
- 8.3.12 Overvoltage Lockout (OVLO)
- 8.3.13 Overcurrent Protection
- 8.3.14 Power Good (PG)
- 8.3.15 Remote Sense
- 8.3.16 Thermal Warning and Shutdown
- 8.3.17 Stacked Operation
- 8.4 Device Functional Modes
- 8.5 Programming
- 9 Register Map
- 10Application and Implementation
- 11Device and Documentation Support
- 12Revision History
- 13Mechanical, Packaging, and Orderable Information
8.3.4 Start-Up
When the voltage on the VIN pin exceeds the positive-going UVLO threshold, the device initializes as follows:
- The device pulls the EN pin low.
- The device enables the internal reference voltage.
- The device reads the state of the VSEL, FSEL, and SYNC_OUT pins.
- The device loads the default values into the device registers.
When initialization is complete, the device enables I2C communication and releases the EN pin. The external circuitry controlling the EN pin now determines the behavior of the device:
- If the EN pin is low, the device is disabled. The user can write to and read from the device registers, but the DC/DC converter does not operate.
- If the EN pin is high, the device is enabled. The user can write to and read from the device registers and, after a short delay, the DC/DC converter starts to ramp up the output.
Figure 8-7 shows the start-up sequence when the EN pin is pulled up to VIN.
Figure 8-7 Start-Up Timing When EN is Pulled Up to VIN
Figure 8-8 shows the start-up sequence when an external signal is connected to the EN pin.
Figure 8-8 Start-Up Timing When an External Signal is Connected to the EN Pin
The SSTIME[1:0] bits in the CONTROL2 register select the duration of the soft-start ramp:
- td(RAMP) = 500μs
- td(RAMP) = 1ms (default)
- td(RAMP) = 2ms
- td(RAMP) = 4ms
The device ignores new values until the soft-start sequence is complete if the user programs the following when the device soft-start sequence has already started:
- A new output voltage setpoint (VOUT[7:0])
- An output voltage range (VRANGE[1:0])
- Soft-start time (SSTIME[1:0]) settings
If the user change the value of VSET[7:0] during soft start, the device first ramps to the value that VSET[7:0] had when the soft-start sequence began. Then, when soft start is complete, the device ramps up or down to the new value.
The device can start up into a prebiased output. In this case, only a portion of the internal voltage ramp is seen externally (see Figure 8-9).
Figure 8-9 Start-Up into a Prebiased Output
Note that the device always operates in DCM during the start-up ramp, regardless of other configuration settings or operating conditions.