11.1 Layout Guidelines

The PCB layout is an important step to maintain the high performance of the TPS6305x devices.

• Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Routing wide and direct traces to the input and output capacitor results in low-trace resistance and low parasitic inductance.
• Use a common-power GND.
• The sense trace connected to FB is signal trace. Keep these traces away from L1 and L2 nodes.
• For the HotRod package option it is important to add a capacitor between FB node and ground to filter ground noise and to match efficiency results documented in these datasheet.