ZHCSNV8B December   2021  – August 2024 TPS63901

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Trapezoidal Current Control
      2. 6.3.2 Device Enable and Disable
      3. 6.3.3 Soft Start
      4. 6.3.4 Input Current Limit
      5. 6.3.5 Dynamic Voltage Scaling
      6. 6.3.6 Device Configuration (Resistor-to-Digital Interface)
      7. 6.3.7 SEL Pin
      8. 6.3.8 Short-Circuit Protection
        1. 6.3.8.1 Current Limit Setting = 'Unlimited'
        2. 6.3.8.2 Current Limit Setting = 1 mA to 100 mA
      9. 6.3.9 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Inductor Selection
        2. 7.2.2.2 Output Capacitor Selection
        3. 7.2.2.3 Input Capacitor Selection
        4. 7.2.2.4 Setting The Output Voltage
      3. 7.2.3 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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订购信息

Pin Configuration and Functions

TPS63901 12-Ball WCSP Package (Top View)Figure 4-1 12-Ball WCSP Package (Top View)
Table 4-1 Pin Functions
Pin Type Description
Name No.

LX1

A1

Switching node of the buck stage
VIN

A2

Supply voltage
EN

A3

I Device enable. A high level applied to this pin enables the device and a low level disables it. It must not be left open.

GND

B1,C1

Ground
CFG1

B2

I Configuration pin 1. Connect a resistor between this pin and ground to set VO(2) and input current limit. Must not be left open.
SEL

B3

I Output voltage select. Selects VO(2) when a high level is applied to this pin. Selects VO(1) when a low level is applied to this pin. It must not be left open.
VOUT

C2,D2

Output voltage. The C2 and D2 pins must be connected together.
CFG2

C3

I Configuration pin 2. Connect a resistor between this pin and ground to set VO(2) and input current limit. Must not be left open.
LX2

D1

Switching node of the boost stage
CFG3 D3 I Configuration pin 3. Connect a resistor between this pin and ground to set VO(1). Must not be left open.