VL4 |
voltage at L4 pin |
|
2.8 |
|
39 |
V |
Vsink1,2 |
Input voltage at ISINK1, ISINK2 pins |
|
|
|
16 |
V |
VOUT |
Internal overvoltage protection |
|
35 |
37 |
39 |
V |
|
Maximum boost factor (Vout/Vin) |
Isink1 = Isink2 = 20 mA, Vin = 2.8 V |
9 |
10 |
|
|
Tmin_off |
Minimum off pulse width |
|
|
70 |
|
ns |
RDS(ON) |
N-channel MOSFET ON-resistance |
VL4 = 3.6 V |
|
0.6 |
|
Ω |
|
N-channel MOSFET current limit |
|
0.8 |
1.6 |
2 |
A |
ILN_NFET |
N-channel leakage current |
VDS = 25 V, TA = 25°C |
|
|
1 |
µA |
|
Switching frequency |
|
|
1.125 |
|
MHz |
Vsink1, Vsink2 |
Minimum voltage drop at Isink pin to GND for proper regulation |
|
|
400 |
|
mV |
VISET |
ISET pin voltage |
|
|
1.24 |
|
V |
KISET |
Current multiple Iout/Iset |
Iset current = 15 µA |
|
1000 |
|
|
Iset current = 25 µA |
|
1000 |
|
|
Isink1, Isink2 |
Minimum current into ISINK1, ISINK2 pins |
For proper dimming (string can be disabled also) |
|
|
4 |
mA |
Maximum current into ISINK1, ISINK2 pins |
Vin = 3.3 V |
|
25 |
|
mA |
|
DC current set accuracy |
Isinkx = 5 mA to 25 mA; no PWM dimming |
|
|
±5% |
|
|
Current difference between Isink1 and isink2 |
Rset1 = 50k; Isink1 = 25 mA, Vin = 3.6 V; no PWM dimming |
|
|
±5% |
|
|
Current difference between Isink1 and Isink2 |
Rset2 = 250k; Isink1 = 5 mA, Vin = 3.6 V; no PWM dimming |
|
|
±5% |
|
fPWM |
PWM dimming frequency |
PWM dimming Bit = 00 |
–15% |
100 |
15% |
|
PWM dimming Bit = 01 (default) |
–15% |
200 |
15% |
Hz |
PWM dimming Bit = 10 |
–15% |
500 |
15% |
PWM dimming Bit = 11 |
–15% |
1000 |
15% |
|
Rise / fall time of PWM signal |
For all PWM frequencies |
|
2 |
|
µs |
|
Dimming PWM DAC resolution |
|
|
1% |
|
|