For the TPS650944 device, if register reset is desired when the PMICEN pin is pulled low, an alternate reset condition can be used. There are two simple options. The first option is to write 1 to the SDWN bit in the FORCESHUTDN register (see Section 7.6.18, FORCESHUTDN: Force Emergency Shutdown Control Register) to force power rails to turn off and reset all registers. The second option is to use the falling edge detection of the THERMTRIPB pin to trigger the device reset. In this case, when the PMICEN pin is pulled low, the THERMTRIPB pin on PMIC should be pulled low simultaneously, which can be done in several ways. One approach is to connect a low-voltage Schottky diode between the PMICEN and THERMTRIPB pins. Because the THERMTRIPB SoC pin is push-pull configured, a second diode is needed to prevent shorting the SoC pin to GND. An example can be seen in Figure 8-8. Both diodes must have a forward voltage below PMIC V_IL (0.4 V) at the appropriate current. Another approach is to route the THERMTRIPB signal from SoC through the EC and tie PMICEN and THERMTRIPB together at the PMIC.

Not applicable if LDOA1 is not configured to "Always On"

Figure 8-8 PMICEN and THERMTRIPB Connection Option for LDOA1 "Always On" Spins

For the TPS650944 device, if both the PVINSWA1 and PVINSWB1_B2 pins are tied to 2.5 V, LDOA2 and LDOA3 will turn on if all VRs and load switches are enabled and have released their Power Good signals. To avoid LDOA2 and LDOA3 turning on unexpectedly, TI recommends using voltages other than 2.5 V on both SWA1 and SWB1_2.