Table 7-3 is the logic table for the device.
Table 7-3 Logic table
| EN |
I2C_CON(1)(2)(3) |
SCL |
VCTRL |
VLNB(4) |
| H |
0 |
H |
H |
19.4 V |
| H |
0 |
H |
L |
14.6 V |
| H |
0 |
L |
H |
18.2 V |
| H |
0 |
L |
L |
13.4 V |
| X |
1 |
X |
X |
Controlled by VSET[3:0]
bits at 0x01 register(5) |
| L |
0 |
X |
X |
0 V |
(1) I2C_CON is the bit7 of the I2C control register 0x01, which is used to set the VLNB output controlled by the
I2C register or not.
(2) When I2C interface is used in design, all the I2C registers are accessible even if the I2C_CON bit
is 0b.
(3) When I2C_CON is 1b, the VLNB output is controlled by the I2C control register even if the EN pin is low.
(4) When I2C interface is used in design, it is recommended to set the I2C_CON with 1b, if not, the LNB output will
be variable because the SCL is toggled by the I2C register access as the clock signal.
(5) Bit EN of the control register2 is used to disable or enable the LNB output, by default , the bit EN is 1b which enable
the LNB output.