The TPS65262-1 is a monolithic, triple-synchronous step-down (buck) converter with 3-A/1-A/1-A output currents. A wide 4.5- to 18-V input supply voltage range encompasses most intermediate bus voltages operating off 5-V, 9-V, 12-V, or 15-V power bus. The feedback voltage reference for each buck is 0.6 V. Each buck is independent with dedicated enable, soft-start, and loop compensation.

The TPS65262-1 implements a constant frequency, peak current mode control that simplifies external loop compensation. The switching frequency is fixed 600 kHz. The switching clock of buck1 is 180° out-of-phase operation from the clocks of buck2 and buck3 channels to reduce input current ripple, input capacitor size, and power-supply-induced noise.

The TPS65262-1 is designed for safe monotonic startup into prebiased loads. The default start up is when VIN is typically 4.25 V. The ENx pin can also be used to adjust the input voltage undervoltage lockout (UVLO) with an external resistor divider. In addition, the ENx pin has an internal 3.6-µA current source, so the EN pin can be floating for automatically powering up the converters.

The TPS65262-1 reduces the external component count by integrating the bootstrap circuit. The bias voltage for the integrated high-side MOSFET is supplied by a capacitor between the BST and LX pins. A UVLO circuit monitors the bootstrap capacitor voltage VBST-VLX in each buck. When VBST-VLX voltage drops to the threshold, LX pin is pulled low to recharge the bootstrap capacitor. The TPS65262-1 can operate at 100% duty cycle as long as the bootstrap capacitor voltage is higher than the BOOT-LX UVLO threshold, which is typically 2.1 V.

The TPS65262-1 features a PGOOD pin to supervise each output voltage of buck converters. The TPS65262-1 has power good comparators with hysteresis, which monitor the output voltages through feedback voltages. When all bucks are in regulation range and power sequence is done, PGOOD is asserted to high.

The SS (soft-start/tracking) pin is used to minimize inrush currents during power-up. A small-value capacitor or resistor divider is coupled to the pin for soft-start or voltage tracking.

At light loading, TPS65262-1 automatically operates in PSM to save power.

The TPS65262-1 integrates low dropout voltage linear regulators (LDO) with input voltage from 1.3 to 5.5 V, independent enable, and adjustable outputs, up to 350 mA for LDO1 and 150 mA for LDO2 continuous output current.

The TPS65262-1 is protected from overload and overtemperature fault conditions. The converter minimizes excessive output overvoltage transients by taking advantage of the power good comparator. When the output is more than 107.5% of the 0.6-V reference voltage, the high-side MOSFET is turned off until the internal feedback voltage is lower than 105% of the 0.6-V reference voltage. The TPS65262-1 implements both high-side MOSFET overload protection and bidirectional low-side MOSFET overload protections to avoid inductor current runaway. If the overcurrent condition lasts for more than the OC wait time (0.5 ms), the converter shuts down and restarts after the hiccup time (14 ms). The TPS65262-1 shuts down if the junction temperature is higher than thermal shutdown trip point 160°C. When the junction temperature drops 20°C (typical) below the thermal shutdown trip point, the TPS65262-1 is restarted under control of the soft-start circuit automatically.