ZHCSCL5D january 2014 – may 2023 TPS65262
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Adjusting the Output Voltage
- 7.3.2 Enable and Adjusting Undervoltage Lockout
- 7.3.3 Soft-Start Time
- 7.3.4 Power-Up Sequencing
- 7.3.5 V7V Low Dropout Regulator and Bootstrap
- 7.3.6 Out-of-Phase Operation
- 7.3.7 Output Overvoltage Protection (OVP)
- 7.3.8 PSM
- 7.3.9 Slope Compensation
- 7.3.10 Overcurrent Protection
- 7.3.11 Power Good
- 7.3.12 Thermal Shutdown
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
7.3.4.2 Automatic Power Sequencing
The TPS65262 starts with a predefined power-up and power-down sequence when MODE pin driven to high. As shown in Table 7-2, the sequence is dictated by the different combinations of EN1 and EN2 status. EN3 is used to start/stop the converters. Buck2 and buck3 are identical converters and can be swapped in the system operation to allow for additional sequencing stages. Figure 7-4 shows the power sequencing when EN1 and EN2 are pulled up high.
Table 7-2 Power Sequencing
| MODE | EN1 | EN2 | EN3 | Start Sequencing | Shutdown Sequencing | |
|---|---|---|---|---|---|---|
| Automatic Power Sequencing | High | High | High | Used to start/stop bucks in sequence | Buck1→buck2→buck3 | Buck3→buck2→buck1 |
| High | Low | High | Buck2→buck1→buck3 | Buck3→buck1→buck2 | ||
| High | High | Low | Buck2→buck3→buck1 | Buck1→buck3→buck2 | ||
| High | Low | Low | Reserved | Reserved | Reserved | |
| Externally controlled sequencing | Low | Used to start/stop buck1 | Used to start/stop buck2 | Used to start/stop buck3 | x | x |
Figure 7-4 Automatic Power Sequencing