ZHCSCV2C june 2014 – may 2023 TPS65263
PRODUCTION DATA
The TPS65263 requires a start condition, a valid I2C address, a register address byte, and a data byte for a single update. After the receipt of each byte, TPS65263 device acknowledges by pulling the SDA line low during the high period of a single clock pulse. A valid I2C address selects the TPS65263. TPS65263 performs an update on the falling edge of the LSB byte.
When the TPS65263 is in hardware shutdown (EN1, EN2, and EN3 pin tied to ground) the device cannot be updated through the I2C interface. Conversely, the I2C interface is fully functional during software shutdown (EN1, EN2, and EN3 bit = 0).