In the operating states (RESET, DIAGNOSTIC, ACTIVE, and SAFE), if the BOOST switching-clock error is detected while the internal OSC clock source is in good condition, the following occurs:

• The BOOST_FSW_CLK_ERR status bit is set.
• The BOOST converter is disabled without activating resistive discharge.
• The device goes into the SAFE state.
• The device error counter increments.
• The ENDRV/nIRQ pin is asserted low to interrupt the external system MCU.

If the BOOST converter is configured as a RESET state condition (BOOST_UV_RST_EN = 1b), and when the BOOST output discharges to less than its UV-threshold level, then the device goes into the RESET state. In the RESET state, the BOOST converter is enabled again only after the BOOST converter discharges below the V_{BOOST_RESTART_LEVEL} voltage level and after the SYNC_IN, PLL/VCO and f_{SW_BOOST} clock monitors indicate that the clocks are in good condition. Enabling the BOOST converter again is followed by a full ABIST run during an NRES extension, after there is no active RESET state condition.

If an ABIST run in the RESET state fails (because of a clock-monitor failure or any other failure) the device goes into the SAFE state again, repeating the same procedure until the device error counter reaches its programmed power-down threshold level and the device goes into the OFF state.

While the device is in the SAFE state, the system MCU can detect if a reported clock failure occurred because of a clock-monitor failure or true clock failure. A false clock failure occurs when a clock monitor fails. In case of a false clock-failure detection, the system MCU can disable clock monitoring.

While the device is in the RESET state and when the BOOST converter is enabled again, the device goes into the OFF state, if the BOOST converter does not ramp-up within the time-out interval for the RESET state.

If the BOOST is not configured as a RESET state condition (BOOST_UV_RST_EN = 0b), the device stays in the SAFE state as the BOOST output discharges to less than its UV-threshold level. The system MCU can enable the BOOST converter by setting the BOOST_EN control bit in the PWR_CTRL control register.

While the device is in the SAFE state, the system MCU can command a clock-monitor diagnostic test to be performed. If this diagnostic test fails, the system MCU can disable the clock monitoring function. As a single-point failure, a clock monitoring circuit failure is not a critical failure, and therefore, the system MCU can ignore it.