ZHCSL05C October 2019 – October 2023 TPS65313-Q1
PRODUCTION DATA
The device can enter the ACTIVE state only from the DIAGNOSTIC state, when the MCU sets the DIAG_EXIT control bit and the WD_FAIL, and when the MCU_ESM_FAIL status bits have been cleared. As the device goes into the ACTIVE state, the watchdog failure counter (WD_FC) and failure counter for the MCU error-pin (MCU_ESM_FC) are initialized to their default values.
While the device is in the ACTIVE state, the system MCU cannot change any device configuration register bit but can read them out through the SPI. All monitoring and protection functions stay enabled in the ACTIVE state.
To activate the ENDRV/nIRQ output driver, the system MCU must service the watchdog function to decrement the watchdog failure counter (WD_FC) to less than the default (or programmed) WD_FC_ENDRV_TH threshold value. The ENDRV_EN control bit is then set to 1b.
While the device is in the ACTIVE state, the system MCU can enable the device ABIST scheduler to run analog diagnostic tests in synchronization with the watchdog-function scheduler. If the ENDRV/nIRQ driver is activated, and if any of the BUCK1_OT_WARN_IRQ_EN, BUCK12_OT_WARN_IRQ_EN, or BOOST_OT_WARN_IRQ_EN bits are set, then the ABIST comparator diagnostic test toggles the ENDRV/nIRQ pin for the ABIST test-pulse duration shown in Figure 11-5. This diagnostic test does not clear the ENDRV_EN control bit and does not cause the device to go to the SAFE state.