The TPS65313-Q1 WD function has two different functional modes of operation defined as follows:

For both WD modes and when the device is in the DIAGNOSTIC state, the device provides a WD pending question through the SPI-mapped WDT_QUESTION_VALUE register and its WD_QUESTION[3:0] bits. The MCU performs a fixed series of arithmetic operations on the WD question value and returns a single WD answer (in a Q&A single-answer mode) or four WD answers (in a Q&A multi-answer mode) to the device by writing to the WDT_ANSWER register.

The WD answers provided by the system MCU are considered correct when the following occurs:

• For WD Q&A multi-answer mode:
  • All answers have the correct value.
  • Answers were received in the correct sequence order.
  • Answers were received in the correct timing intervals during RESPONSE WINDOW 1 and RESPONSE WINDOW 2.
• For WD Q&A single-answer mode:
  • The answer has the correct value.
  • The answer was received during the active OPEN WINDOW.

The WD answer provided by the system MCU is considered incorrect when one of the following occurs:

• The MCU returns SPI answers before or after the correct timing window.
• The MCU returns an incorrectly calculated WD answer.
• The MCU returns the correct answers in the wrong sequence.

A WD time-out event occurs if the MCU fails to send any WD-related SPI responses during programmed WD windows (RESPONSE WINDOW 1 and RESPONSE WINDOW 2 for WD Q&A multi-answer mode, or OPEN WINDOW and CLOSE WINDOW for WD Q&A single-answer mode). A WD time-out event is considered a no answer event and the TIME_OUT status bit is set. Each WD TIME_OUT event increments the WD_FAIL_CNT[3:0] counter by 1 and is followed by the start of a new WD Q&A sequence run.

The WD TIME_OUT event can be used by the MCU application software (SW) to establish synchronization between the device and MCU SW and HW processes. Each WD TIME_OUT event is followed by the start of a new WD Q&A sequence run. Another way to synchronize the MCU and the device WD function is updating the device WD configuration or WD window duration. Each configuration update increments the WD_FAIL_CNT[3:0] counter by 1, followed by the start of a new WD Q&A sequence run. All events that trigger new WD cycle start are covered in WD Function Initialization Table 11-13. The default setting for WD_RST_EN bit is 1b.