6.4.2.3 SLEEP and WAKE Requests
SLEEP requests are used to put the device in the SLEEP state, meaning a transition from the ACTIVE to SLEEP state. This sets internal resources into low-power mode, as well as user-defined resources into their user predefined low-power mode. The states of the resources during active and sleep modes are defined in the LDO*_CTRL registers and SMPS*_CTRL registers.
Table 6-12 lists the SLEEP requests. Any of these events trigger the ACT2SLP sequence, unless there are pending interrupts (unmasked). Only an interrupt or NSLEEP inactive (high) generates a WAKE request to wake up the device (exit from the SLEEP state). A WAKE request (only during the SLEEP state) wakes up the device and triggers a SLEEP2ACT or a SLEEP2OFF power sequence.
Table 6-12 SLEEP Requests
| EVENT |
MASKABLE |
POLARITY |
COMMENT |
| NSLEEP (terminal) |
Yes (Default: Masked) |
Low |
Level sensitive |
For each resource, a transition from the ACTIVE to SLEEP state or SLEEP to ACTIVE state can be controlled in two different ways:
- Through EPC sequencing (ACT2SLP or SLP2ACT power sequence), when the resource is associated to the NSLEEP signal.
- Through direct control of the resource power mode (active or sleep).
- The user can bypass SLEEP and WAKE sequencing by having resources assigned to one external control signal (ENABLE1). This signal has direct control on the power modes (active or sleep) of any resources associated to it and it triggers an immediate switch from one mode to the other, regardless of the EPC sequencing.
All resources can therefore be associated to two external terminals (NSLEEP and ENABLE1) and they switch between the SLEEP and ACTIVE states based on Table 6-13.
Table 6-13 Resources SLEEP and ACTIVE Assignments
| ENABLE1 ASSIGNMENT |
NSLEEP ASSIGNMENT |
ENABLE1 TERMINAL STATE |
NSLEEP TERMINAL STATE |
STATE |
TRANSITION |
| 0 |
0 |
Don't care |
Don't care |
ACTIVE |
None |
| 0 |
1 |
Don't care |
0 ↔ 1 |
SLEEP ↔ ACTIVE |
Sequenced |
| 1 |
0 |
0 ↔ 1 |
Don't care |
SLEEP ↔ ACTIVE |
Immediate |
| 1 |
1 |
0 |
0 ↔ 1 |
SLEEP ↔ ACTIVE |
Sequenced |
| 1 |
0 ↔ 1 |
ACTIVE |
None |
| 0 ↔ 1 |
0 |
SLEEP ↔ ACTIVE |
Immediate |
| 0 ↔ 1 |
1 |
ACTIVE |
None |
NOTE
- The polarity of the NSLEEP and ENABLE1 signals is configurable through the POLARITY_CTRL register. By default:
- ENABLE1 is active high; a transition from 0 to 1 requests a transition from SLEEP to ACTIVE.
- NSLEEP is active low; a transition from 1 to 0 requests a transition from ACTIVE to SLEEP.
- Resource assignments to the NSLEEP and ENABLE1 signals are configured in the ENABLEx_YYY_ASSIGN and NSLEEP_YYY_ASSIGN registers (where x = 1 or 2 and YYY = RES or SMPS or LDO)
- Several resources can be assigned to the same ENABLE1 signal and therefore, when triggered, they all switch their power mode at the same time.
- When resources are assigned only to the NSLEEP signal, their respective switching order is controlled and defined in the power sequence.
- When a resource is not assigned to any signal (NSLEEP and ENABLE1), it never switches from the ACTIVE to SLEEP state. The resource always remains in active mode.
CAUTION
A defect in the digital controller of TPS65903x-Q1 was discovered, which may cause the PLL to shut down unexpectedly under the following sequence of events:
- PLL is programmed to be OFF under SLEEP mode through the PLLEN_CTRL register
- NSLEEP is assigned to control the entering of SLEEP mode for the PLL through the NSLEEP_RES_ASSIGN register
- TPS65903x-Q1 goes through a SLP2OFF state transition followed by an OFF2ACT state transition
- PLL is again assigned to be OFF in SLEEP mode through the programming of the PLLEN_CTRL and the NSLEEP_RES_ASSIGN registers while the device remains in ACTIVE mode
Two possible actions are recommended to help prevent the PLL from shutting down unexpectedly:
- [Hardware Implementation] Toggle the NSLEEP pin twice to force the ACT2SLP and SLP2ACT state transitions as soon as TPS65903x-Q1 wakes up from back to back SLP2OFF and OFF2ACT state transitions
- [Software Implementation] Toggle the NSLEEP_POLARITY bit (0 → 1 → 0) of the POLARITY_CTRL register to force the ACT2SLP and SLP2ACT device state transitions as soon as TPS65903x-Q1 wakes up from back to back SLP2OFF and OFF2ACT state transitions