6.4.5.2 AUTODEVON Mode

In this mode, at the end of the power-up sequence, the register bit DEV_CTRL.DEV_ON is automatically set to 1 and the device remains in its ACTIVE state until this bit is cleared by the host processor.

Figure 6-22 and Figure 6-23 show the AUTODEVON mode timing diagrams.

Figure 6-22 AUTODEVON Mode Timing Diagrams

The DEV_ON bit can also be configured so that it is not auto-updated (set to 1) at the end of the power-up sequence. In this case, the device behaves similarly to the POWERWHOLD mode, except the host has control over it using the DEV_CTRL.DEV_ON register bit instead of the POWERHOLD terminal. Therefore, to keep the device active, the host must set and keep this bit at 1.

Figure 6-23 DEV_ON Mode Timing Diagrams