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ZHCSGJ3D July 2015 – February 2019 TPS65917-Q1

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机械数据 (封装 | 引脚)

RGZ|48

散热焊盘机械数据 (封装 | 引脚)

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5.12.2.1 SPI Modes

This SPI supports two access modes which are single access and burst access. All shifts occur with the most significant bit (MSB) first (data, address, page). These two access modes have the following features:

Single access (read or write)
- This mode consists of fetching and storing one single data location. The protocol is shown in Figure 5-21.
- The R/W bit is always provided first, followed by page address and register address fields. When the R/W bit = 0, a read access is performed. When the R/W bit = 1, a write access is performed.
- One burst bit indicates if the following transfer is a single access (BURST = 0) or a burst access (BURST = 1).
- Four unused bits follow the burst bit and the 8-bit data is finally either shifted in (write) or out (read).
- For a write access, the data output line SDO is invalid (useless) during the whole transaction.
- For a read access, the data output line SDO is invalid during the unused bits (time slot used for data fetch) and then becomes active or valid after the unused bits.
Burst access (read or write)
- This mode consists of fetching and storing several data at contiguous locations. The protocol is shown in Figure 5-22.
- The R/W bit is always provided first, followed by page address and register address fields. When the R/W bit 0, a read access is performed. When the R/W bit 1, a write access is performed.
- One burst bit indicates if the following transfer is a single access (BURST = 0) or a burst access (BURST = 1).
- Four unused bits follow the burst bit and packets of 8-bit data are finally either shifted in (write) or out (read).
- The transaction remains active as long as the SCE signal is maintained high by the host.
- The address is automatically incremented internally for each new 8-bit packet received.
- The host must pull the SCE signal low after a complete 8-bit data is transferred, otherwise the last transaction is discarded.
- For a write access, the data output line SDO is invalid (useless) during the whole transaction.
- For a read access, the data output line SDO is invalid during the unused bits (time slot used for data fetch) and then becomes active or valid after the unused bits.