During Boot BIST and RUNTIME BIST, both the Logic BIST (LBIST) on the SPMI logic and the SPMI-BIST are performed to check correct operation of the SPMI bus. The LBIST is performed first before the SPMI-BIST during BOOT BIST and RUNTIME BIST. The SPMI-BIST is implemented by reading TID from each target device on the SPMI bus into the controller device, and ensuring they are unique and match the expected amount of target devices. This process of checking the TID of each target device ensures that:

• All SPMI target devices are present in the system as expected
• The SPMI logic blocks are working on the SPMI controller device and all of the SPMI target devices
• The pins and wires on the ICs and PCB are in working order

The SPMI-BIST is initiated by the SPMI controller block in the primary PMIC by writing a request to all SPMI target device(s) (using GTID) to send their TIDs to the SPMI controller block of the primary PMIC. Upon receiving this command from the SPMI controller device, the SPMI target devices request SPMI bus arbitration using the SR-bit protocol. Upon winning the bus arbitration the SPMI target devices transmit their TID into the SPMI target block of the primary PMIC.

The SPMI controller block of the primary PMIC contains a list of all SPMI target device(s) on the SPMI bus and their TIDs in the register set. The SPMI controller block of the primary PMIC reads the TID from each SPMI target device and compares the result with the stored TID for the corresponding SPMI target device. The SPMI controller device has to ensure that every non-zero TID on its list is returned, in order to support use cases in which there are two or more identical SPMI target devices, with same TID, in the system. In these cases, it is mandatory that the expected number of the same TIDs is returned. If no identical PMICs are to be used, then a return of the same TID multiple times is an error due to incorrect assembly of identical PMICs onto the PCB. An all-zero TID stored in the list of the primary PMIC indicates that there are no SPMI target device(s) present on the SPMI Bus.